For some reason all my responses of the last week via 
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On Saturday, September 21, 2019 at 8:46:56 AM UTC-4, Hanah anees wrote:
>
> I am using ST7735S.It has a 3 wire serial mode which is 9 bit in every 
> "byte transaction, 9th bit 1 for command and 0 for data.
> It does have a 4 wire configuration (which would have made my life much 
> easier), but the hardware vendor wanted it to be 3 wire mode. Can we even 
> do this over SPIDEV in user space? I have set 9 bit word size and nothing 
> seems to help.
>
>
If I understand the documentation 
https://www.crystalfontz.com/controllers/Sitronix/ST7735S/437/ the 3-wire 
mode uses the SAME pin for both input and output data. If so,you can NOT 
rely on a "loopback" echoing the output command/data as you'd be reading 
bits from your own output, possibly delayed by a half clock or so. 

How does one even wire this? Processor MISO and MOSI both connected to one 
pin (SDA) of the display?

The documentation indicates that 1) you should only be reading display 
output after sending a "read command" and 2) the output from the processor 
needs to go tri-state (float/open) at the end of said command before 
reading the display return value. You need to keep chip select and clock 
going through this cycle.

That's a half-duplex mode, where each side takes turns putting data on the 
bus. I don't think SPI operates that way -- SPI is full-duplex, with both 
sides putting data on the bus on each clock cycle. 
https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Three-wire_serial_buses
 
"Few SPI master controllers support this mode; although it can often be 
easily bit-banged in software. "

You might have to code the protocol using a PRU, with some interface to the 
main processor for sending/receiving data. Though, given that the protocol 
only transfers on clock transitions, just using GPIO from Linux may be 
sufficient -- a longer clock cycle from the OS pre-empting your code 
shouldn't matter.

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