HI Mark, was trying to use the loop instruction ..... .global ausgabe ausgabe: ldi r18, 0 ; initialisation ldi r30, 0x10 ; debug ldi r17, 0x00 ; debug mov r20, r15 ; save start addresss mov r21, r14 ; save number of pattern naechster: loop next_pattern, r14 ; for each pattern lbbo &r30, r15, 4, 1 ; output (r15) = pattern lbbo &r17, r15, 0, 2 ; load number of delay loops loop weiter, R17 ; delay loop weiter: add r15, r15, 5 ; increment address pointer by 5 ( next data structure element ) next_pattern: mov r15, r20 ; load saved start address in address pointer mov r14, r21 ; load saved number of pattern in pattern counter lbbo &r18, r16, 0, 1 ; check if stop request or r30, r30, (1<<4) ; debug qbeq naechster, r18, 0 ; if handshake[0] == 0 continue jmp r3.w2 ; otherwise return r3 contains return address
********************************************************************************** I used prudebug to test the behavior. So the loop instruction is not known ( UNKNOWN in disassembler list ) Is not a solution for Beaglebone black. Assembler did not warn or complain. Bottom line ... independent of the above code, I'm missing the 200MHz performance, I'm far away, seems to be 20:1 .... if I think in 5nsec instruction time cycles for register operations. There is something else .... up to now no idea what it can be. Thanks for help and thinking Kasimir -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/2f40337b-11dc-44a5-8c3e-c78a9e8890b1n%40googlegroups.com.
