Dear all:
when i use the Verilog::Netlist package , I know how to create new port ,cell or pins, but how to write back file .??

thanks ,
KT.Lu

--
To unsubscribe, e-mail: beginners-unsubscr...@perl.org
For additional commands, e-mail: beginners-h...@perl.org
http://learn.perl.org/


Reply via email to