HI
i wrote a perlscript to generate a verilog code with instantiations .in this
after instantiation, the ports getting as eg
module_name name(.a(a),.b(b),.......)
but for connection sakeif want to connect a to some k and b to some p
(say).here we wanted to change those names manually. is ther any way to do
trhis automatically in the instantiation part of the perl script itself.please
help me.
Advance Thanks
devaraja
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