The patch looks good to me. There are still some "ALL" predication in GenContext::UnsignedI64ToFloat, could you help fix that?
Thanks! Ruiling -----Original Message----- From: Beignet [mailto:[email protected]] On Behalf Of Zhigang Gong Sent: Sunday, May 04, 2014 9:03 AM To: [email protected] Cc: Gong, Zhigang Subject: [Beignet] [PATCH] GBE: fixed a regression at "Long" div/rem. If the GEN_PREDICATE_ALIGN1_ANY8H/ANY16H or ALL8H/ALL16H are used, we must make sure those inactive lanes are initialized correctly. For "ANY" condition, all the inactive lanes need to be clear to zero. For "ALL" condition, all the inactive lanes need to be set to 1s. Otherwise, it may cause infinite loop. Signed-off-by: Zhigang Gong <[email protected]> --- backend/src/backend/gen_context.cpp | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp index 62b58bd..369c1bf 100644 --- a/backend/src/backend/gen_context.cpp +++ b/backend/src/backend/gen_context.cpp @@ -1525,9 +1525,16 @@ namespace gbe p->SHR(g, g, one); // condition: m < 64 p->ADD(m, m, one); + p->push(); - p->curr.predicate = GEN_PREDICATE_NONE; p->curr.noMask = 1; + p->curr.execWidth = 1; + p->MOV(flagReg, zero); + p->pop(); + + p->push(); + p->curr.predicate = GEN_PREDICATE_NONE; + p->curr.noMask = 0; p->curr.useFlag(flagReg.flag_nr(), flagReg.flag_subnr()); p->CMP(GEN_CONDITIONAL_L, m, GenRegister::immud(64)); -- 1.8.3.2 _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
