Due to the exec size is always larger or equal to 2,
we need to change the scalar byte size to 2 rather than
1. Otherwise, it may generate the following illegal instruction:
(17 ) mov(1) g127.31<1>UB 0x2UW {
align1 WE_all };
Signed-off-by: Zhigang Gong <[email protected]>
---
backend/src/backend/gen_reg_allocation.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/backend/src/backend/gen_reg_allocation.cpp
b/backend/src/backend/gen_reg_allocation.cpp
index 5098f34..718f618 100644
--- a/backend/src/backend/gen_reg_allocation.cpp
+++ b/backend/src/backend/gen_reg_allocation.cpp
@@ -108,7 +108,7 @@ namespace gbe
// Note that byte vector registers use two bytes per byte (and can be
// interleaved)
static const size_t familyVectorSize[] = {2,2,2,4,8};
- static const size_t familyScalarSize[] = {2,1,2,4,8};
+ static const size_t familyScalarSize[] = {2,2,2,4,8};
using namespace ir;
const bool isScalar = ctx.sel->isScalarOrBool(reg);
const RegisterData regData = ctx.sel->getRegisterData(reg);
--
1.8.3.2
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