LGTM, just pushed, thanks.
On Thu, Oct 16, 2014 at 03:10:35PM +0800, Yang Rong wrote: > BDW support HF data type, so use mov directly to convert between Half > Float/Float. > > Signed-off-by: Yang Rong <[email protected]> > --- > backend/src/backend/gen8_encoder.cpp | 8 ++++++++ > backend/src/backend/gen8_encoder.hpp | 2 ++ > backend/src/backend/gen_defs.hpp | 2 +- > backend/src/backend/gen_encoder.cpp | 10 ++++++++-- > backend/src/backend/gen_encoder.hpp | 5 +++-- > 5 files changed, 22 insertions(+), 5 deletions(-) > > diff --git a/backend/src/backend/gen8_encoder.cpp > b/backend/src/backend/gen8_encoder.cpp > index 4ca900d..749bc52 100644 > --- a/backend/src/backend/gen8_encoder.cpp > +++ b/backend/src/backend/gen8_encoder.cpp > @@ -96,6 +96,14 @@ namespace gbe > gen8_insn->bits3.gen7_typed_rw.slot = 1; > } > > + void Gen8Encoder::F16TO32(GenRegister dest, GenRegister src0) { > + MOV(GenRegister::retype(dest, GEN_TYPE_F), GenRegister::retype(src0, > GEN_TYPE_HF)); > + } > + > + void Gen8Encoder::F32TO16(GenRegister dest, GenRegister src0) { > + MOV(GenRegister::retype(dest, GEN_TYPE_HF), GenRegister::retype(src0, > GEN_TYPE_F)); > + } > + > void Gen8Encoder::ATOMIC(GenRegister dst, uint32_t function, GenRegister > src, uint32_t bti, uint32_t srcNum) { > GenNativeInstruction *insn = this->next(GEN_OPCODE_SEND); > Gen8NativeInstruction *gen8_insn = &insn->gen8_insn; > diff --git a/backend/src/backend/gen8_encoder.hpp > b/backend/src/backend/gen8_encoder.hpp > index 6ca3b41..970258b 100644 > --- a/backend/src/backend/gen8_encoder.hpp > +++ b/backend/src/backend/gen8_encoder.hpp > @@ -44,6 +44,8 @@ namespace gbe > virtual void patchJMPI(uint32_t insnID, int32_t jip, int32_t uip); > /*! Get double/long exec width */ > virtual int getDoubleExecWidth(void) { return GEN8_DOUBLE_EXEC_WIDTH; } > + virtual void F16TO32(GenRegister dest, GenRegister src0); > + virtual void F32TO16(GenRegister dest, GenRegister src0); > virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp > = GenRegister::null()); > virtual void LOAD_DF_IMM(GenRegister dest, GenRegister tmp, double > value); > virtual void ATOMIC(GenRegister dst, uint32_t function, GenRegister src, > uint32_t bti, uint32_t srcNum); > diff --git a/backend/src/backend/gen_defs.hpp > b/backend/src/backend/gen_defs.hpp > index 385fdfa..3773ed9 100644 > --- a/backend/src/backend/gen_defs.hpp > +++ b/backend/src/backend/gen_defs.hpp > @@ -246,12 +246,12 @@ enum GenMessageTarget { > #define GEN_TYPE_UB 4 > #define GEN_TYPE_B 5 > #define GEN_TYPE_VF 5 /* packed float vector, immediates only? */ > -#define GEN_TYPE_HF 6 > #define GEN_TYPE_V 6 /* packed int vector, immediates only, uword dest > only */ > #define GEN_TYPE_DF 6 > #define GEN_TYPE_F 7 > #define GEN_TYPE_UL 8 > #define GEN_TYPE_L 9 > +#define GEN_TYPE_HF 10 > > #define GEN_ARF_NULL 0x00 > #define GEN_ARF_ADDRESS 0x10 > diff --git a/backend/src/backend/gen_encoder.cpp > b/backend/src/backend/gen_encoder.cpp > index 847ab7b..1ae4cc5 100644 > --- a/backend/src/backend/gen_encoder.cpp > +++ b/backend/src/backend/gen_encoder.cpp > @@ -678,6 +678,14 @@ namespace gbe > } > } > > + void GenEncoder::F16TO32(GenRegister dest, GenRegister src0) { > + alu1(this, GEN_OPCODE_F16TO32, dest, src0); > + } > + > + void GenEncoder::F32TO16(GenRegister dest, GenRegister src0) { > + alu1(this, GEN_OPCODE_F32TO16, dest, src0); > + } > + > ALU1(MOV) > ALU1(RNDZ) > ALU1(RNDE) > @@ -686,8 +694,6 @@ namespace gbe > ALU1(FBH) > ALU1(FBL) > ALU1(CBIT) > - ALU1(F16TO32) > - ALU1(F32TO16) > ALU2(SEL) > ALU1(NOT) > ALU2_MOD(AND) > diff --git a/backend/src/backend/gen_encoder.hpp > b/backend/src/backend/gen_encoder.hpp > index 3df7a57..d4692e1 100644 > --- a/backend/src/backend/gen_encoder.hpp > +++ b/backend/src/backend/gen_encoder.hpp > @@ -107,8 +107,6 @@ namespace gbe > ALU1(RNDE) > ALU1(RNDD) > ALU1(RNDU) > - ALU1(F16TO32) > - ALU1(F32TO16) > ALU2(SEL) > ALU1(NOT) > ALU2_MOD(AND) > @@ -136,6 +134,9 @@ namespace gbe > #undef ALU2 > #undef ALU2_MOD > #undef ALU3 > + > + virtual void F16TO32(GenRegister dest, GenRegister src0); > + virtual void F32TO16(GenRegister dest, GenRegister src0); > /*! Get double/long exec width */ > virtual int getDoubleExecWidth(void) = 0; > virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp > = GenRegister::null()); > -- > 1.9.1 > > _______________________________________________ > Beignet mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/beignet _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
