If remove the MI_FLUSH, we need to add instruction cache invalidate flag to the corresponding pipe control command.
On Fri, Dec 26, 2014 at 10:32:01AM +0800, Zhenyu Wang wrote: > This is caught in emulator debug that MI_FLUSH is obsolete from > IVB/HSW and beignet used wrong flush bit too, so don't go risk > but remove it. Current kernel would take care to flush ring > after each request, so shouldn't need extra flush. > > Signed-off-by: Zhenyu Wang <[email protected]> > --- > src/intel/intel_batchbuffer.c | 7 ------- > src/intel/intel_batchbuffer.h | 1 - > src/intel/intel_driver.h | 2 -- > src/intel/intel_gpgpu.c | 1 - > 4 files changed, 11 deletions(-) > > diff --git a/src/intel/intel_batchbuffer.c b/src/intel/intel_batchbuffer.c > index a65ac86..dcc8d98 100644 > --- a/src/intel/intel_batchbuffer.c > +++ b/src/intel/intel_batchbuffer.c > @@ -158,13 +158,6 @@ intel_batchbuffer_emit_reloc(intel_batchbuffer_t *batch, > intel_batchbuffer_emit_dword(batch, bo->offset + delta); > } > > -LOCAL void > -intel_batchbuffer_emit_mi_flush(intel_batchbuffer_t *batch) > -{ > - intel_batchbuffer_require_space(batch, 4); > - intel_batchbuffer_emit_dword(batch, MI_FLUSH | > STATE_INSTRUCTION_CACHE_INVALIDATE); > -} > - > LOCAL intel_batchbuffer_t* > intel_batchbuffer_new(intel_driver_t *intel) > { > diff --git a/src/intel/intel_batchbuffer.h b/src/intel/intel_batchbuffer.h > index 121c824..0071be6 100644 > --- a/src/intel/intel_batchbuffer.h > +++ b/src/intel/intel_batchbuffer.h > @@ -96,7 +96,6 @@ extern void > intel_batchbuffer_emit_reloc(intel_batchbuffer_t*, > uint32_t read_domains, > uint32_t write_domains, > uint32_t delta); > -extern void intel_batchbuffer_emit_mi_flush(intel_batchbuffer_t*); > extern void intel_batchbuffer_init(intel_batchbuffer_t*, struct > intel_driver*); > extern void intel_batchbuffer_terminate(intel_batchbuffer_t*); > extern void intel_batchbuffer_flush(intel_batchbuffer_t*); > diff --git a/src/intel/intel_driver.h b/src/intel/intel_driver.h > index 61653db..31ebdad 100644 > --- a/src/intel/intel_driver.h > +++ b/src/intel/intel_driver.h > @@ -61,8 +61,6 @@ > > #define MI_NOOP (CMD_MI | 0) > #define MI_BATCH_BUFFER_END (CMD_MI | (0xA << 23)) > -#define MI_FLUSH (CMD_MI | (0x4 << 23)) > -#define STATE_INSTRUCTION_CACHE_INVALIDATE (0x1 << 0) > > #define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | > 0x04) > #define XY_COLOR_BLT_WRITE_ALPHA (1 << 21) > diff --git a/src/intel/intel_gpgpu.c b/src/intel/intel_gpgpu.c > index 749cd96..6c5b4f8 100644 > --- a/src/intel/intel_gpgpu.c > +++ b/src/intel/intel_gpgpu.c > @@ -730,7 +730,6 @@ static void > intel_gpgpu_flush_batch_buffer(intel_batchbuffer_t *batch) > { > assert(batch); > - intel_batchbuffer_emit_mi_flush(batch); > intel_batchbuffer_flush(batch); > } > > -- > 2.1.4 > > _______________________________________________ > Beignet mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/beignet _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
