As far as I know a Ivy bridge core can do 16 SP operations/clycle and 8 DP ops/cycle using 256 bit FMA.
2013/9/13 Roberto Ammendola <[email protected]>: > Hi list, does anyone know how many SP (and DP) operation per cycle per > core can perform an Intel Xeon E5-2600 V2family processor?Just for > counting peak GFLOPS... > > thanks a lot > > -- > ______________________________________________________________________ > > Roberto Ammendola INFN - Roma II - APE group > tel: +39-0672594504 email: [email protected] // \ > Via della Ricerca Scientifica 1 - 00133 Roma \\_/ // > __________________________________________ ''-.._.-''-.._.. -(||)(') > ''' > > _______________________________________________ > Beowulf mailing list, [email protected] sponsored by Penguin Computing > To change your subscription (digest mode or unsubscribe) visit > http://www.beowulf.org/mailman/listinfo/beowulf _______________________________________________ Beowulf mailing list, [email protected] sponsored by Penguin Computing To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf
