On 2 Mar 2015 03:29, "William ML Leslie" <[email protected]> wrote: > > On 28 February 2015 at 06:47, Keean Schupke <[email protected]> wrote: >> >> And new processors like The Mill's belt architecture rely on it. It effectively has an infinite supply of new registers, and every register store gets a new register, but you cannot access results older than slot 'N' where 'N' is a model dependent number something like 1000+ > > > Wow, this is really cool. How did I not know about this? > > I've found it a bit irritating for a while that my compiler turns its nice SSA form into registers and then the OoOE unit turns it back into SSA. Although I'm a huge, huge, huge fan of IA64, I ended up thinking the best way forward was forth machines like the RTX2000 and reducing multiplier latency. But The Mill is even cooler!
I am not sure how effective it will be. VLIW doesn't work well (including IA64 for general purpose computation) in my opinion because it underestimated the benefit of small instruction size and runtime optimisation in the OoOE unit. X86 code allows the first 8 registers (sufficient for most function calls) to be accessed from compact opcodes. Keean.
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