ChangeSet 1.2181.47.1, 2005/03/28 19:20:57-08:00, [EMAIL PROTECTED]
[SPARC64]: Some more cheetah+ patches needed for fptraps.
Signed-off-by: David S. Miller <[EMAIL PROTECTED]>
entry.S | 63 +++++++++++++++++++++++++++++++++++++++------------------------
1 files changed, 39 insertions(+), 24 deletions(-)
diff -Nru a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
--- a/arch/sparc64/kernel/entry.S 2005-04-03 21:16:57 -07:00
+++ b/arch/sparc64/kernel/entry.S 2005-04-03 21:16:57 -07:00
@@ -252,7 +252,7 @@
faddd %f0, %f2, %f4
fmuld %f0, %f2, %f6
ldxa [%g3] ASI_DMMU, %g5
-cplus_fpdis_insn_1:
+cplus_fptrap_insn_1:
sethi %hi(0), %g2
stxa %g2, [%g3] ASI_DMMU
membar #Sync
@@ -280,7 +280,9 @@
fzero %f34
ldxa [%g3] ASI_DMMU, %g5
add %g6, TI_FPREGS, %g1
- stxa %g0, [%g3] ASI_DMMU
+cplus_fptrap_insn_2:
+ sethi %hi(0), %g2
+ stxa %g2, [%g3] ASI_DMMU
membar #Sync
add %g6, TI_FPREGS + 0x40, %g2
faddd %f32, %f34, %f36
@@ -304,9 +306,11 @@
3: mov SECONDARY_CONTEXT, %g3
add %g6, TI_FPREGS, %g1
ldxa [%g3] ASI_DMMU, %g5
- mov 0x40, %g2
- stxa %g0, [%g3] ASI_DMMU
+cplus_fptrap_insn_3:
+ sethi %hi(0), %g2
+ stxa %g2, [%g3] ASI_DMMU
membar #Sync
+ mov 0x40, %g2
ldda [%g1] ASI_BLK_S, %f0 ! grrr, where is
ASI_BLK_NUCLEUS 8-(
ldda [%g1 + %g2] ASI_BLK_S, %f16
add %g1, 0x80, %g1
@@ -325,24 +329,6 @@
wr %g0, FPRS_FEF, %fprs ! clean DU/DL bits
retry
-cplus_fpdis_1:
- sethi %hi(CTX_CHEETAH_PLUS_CTX0), %g2
-
- .globl cheetah_plus_patch_fpdis
-cheetah_plus_patch_fpdis:
- /* We configure the dTLB512_0 for 4MB pages and the
- * dTLB512_1 for 8K pages when in context zero.
- */
- sethi %hi(cplus_fpdis_1), %o0
- sethi %hi(cplus_fpdis_insn_1), %o2
- lduw [%o0 + %lo(cplus_fpdis_1)], %o1
- or %o2, %lo(cplus_fpdis_insn_1), %o2
- stw %o1, [%o2]
- flush %o2
-
- retl
- nop
-
.align 32
fp_other_bounce:
call do_fpother
@@ -485,10 +471,12 @@
rd %gsr, %g3
stx %g3, [%g6 + TI_GSR]
mov SECONDARY_CONTEXT, %g3
- add %g6, TI_FPREGS, %g2
ldxa [%g3] ASI_DMMU, %g5
- stxa %g0, [%g3] ASI_DMMU
+cplus_fptrap_insn_4:
+ sethi %hi(0), %g2
+ stxa %g2, [%g3] ASI_DMMU
membar #Sync
+ add %g6, TI_FPREGS, %g2
andcc %g1, FPRS_DL, %g0
be,pn %icc, 4f
mov 0x40, %g3
@@ -505,6 +493,33 @@
membar #Sync
ba,pt %xcc, etrap
wr %g0, 0, %fprs
+
+cplus_fptrap_1:
+ sethi %hi(CTX_CHEETAH_PLUS_CTX0), %g2
+
+ .globl cheetah_plus_patch_fpdis
+cheetah_plus_patch_fpdis:
+ /* We configure the dTLB512_0 for 4MB pages and the
+ * dTLB512_1 for 8K pages when in context zero.
+ */
+ sethi %hi(cplus_fptrap_1), %o0
+ lduw [%o0 + %lo(cplus_fptrap_1)], %o1
+
+ set cplus_fptrap_insn_1, %o2
+ stw %o1, [%o2]
+ flush %o2
+ set cplus_fptrap_insn_2, %o2
+ stw %o1, [%o2]
+ flush %o2
+ set cplus_fptrap_insn_3, %o2
+ stw %o1, [%o2]
+ flush %o2
+ set cplus_fptrap_insn_4, %o2
+ stw %o1, [%o2]
+ flush %o2
+
+ retl
+ nop
/* The registers for cross calls will be:
*
-
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