tree f01fab00ff42b55a46ac8662257cdeba217ba449
parent ac3b34d6f85bf3aa33ef8f926e23b0eaf4e44dff
author Andi Kleen <[EMAIL PROTECTED]> Tue Apr 12 08:25:46 2005
committer Linus Torvalds <[EMAIL PROTECTED]> Tue Apr 12 08:25:46 2005
[PATCH] x86_64: add support for Intel dual-core detection and displaying
Appended patch adds the support for Intel dual-core detection and displaying
the core related information in /proc/cpuinfo.
It adds two new fields "core id" and "cpu cores" to x86 /proc/cpuinfo and the
"core id" field for x86_64("cpu cores" field is already present in x86_64).
Number of processor cores in a die is detected using cpuid(4) and this is
documented in IA-32 Intel Architecture Software Developer's Manual (vol 2a)
(http://developer.intel.com/design/pentium4/manuals/index_new.htm#sdm_vol2a)
This patch also adds cpu_core_map similar to cpu_sibling_map.
Slightly hacked by AK.
Signed-off-by: Suresh Siddha <[EMAIL PROTECTED]>
Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
arch/i386/kernel/cpu/amd.c | 13 ++++----
arch/i386/kernel/cpu/common.c | 28 +++++++++++++-----
arch/i386/kernel/cpu/intel.c | 23 +++++++++++++++
arch/i386/kernel/cpu/proc.c | 8 +++++
arch/i386/kernel/smpboot.c | 31 +++++++++++++++++++-
arch/x86_64/kernel/setup.c | 64 ++++++++++++++++++++++++++++++++----------
arch/x86_64/kernel/smpboot.c | 24 ++++++++++++++-
include/asm-i386/processor.h | 1
include/asm-i386/smp.h | 1
include/asm-x86_64/smp.h | 2 +
10 files changed, 163 insertions(+), 32 deletions(-)
Index: arch/i386/kernel/cpu/amd.c
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/arch/i386/kernel/cpu/amd.c
(mode:100644 sha1:6d68198d14c5a9d85dcd9ea5a9ec4d0637e5305e)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/arch/i386/kernel/cpu/amd.c
(mode:100644 sha1:d9774b45a22c5a0eb7ead0f66fc17469b2645837)
@@ -188,6 +188,13 @@
}
display_cacheinfo(c);
+
+ if (cpuid_eax(0x80000000) >= 0x80000008) {
+ c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
+ if (c->x86_num_cores & (c->x86_num_cores - 1))
+ c->x86_num_cores = 1;
+ }
+
detect_ht(c);
#ifdef CONFIG_X86_HT
@@ -199,12 +206,6 @@
if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
smp_num_siblings = 1;
#endif
-
- if (cpuid_eax(0x80000000) >= 0x80000008) {
- c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
- if (c->x86_num_cores & (c->x86_num_cores - 1))
- c->x86_num_cores = 1;
- }
}
static unsigned int amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
Index: arch/i386/kernel/cpu/common.c
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/arch/i386/kernel/cpu/common.c
(mode:100644 sha1:4ac196cd84725a595bdd28cbe997104930d4cf64)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/arch/i386/kernel/cpu/common.c
(mode:100644 sha1:2142c72f9c27d2c5e613821baf9d6835b6871cee)
@@ -434,7 +434,7 @@
void __init detect_ht(struct cpuinfo_x86 *c)
{
u32 eax, ebx, ecx, edx;
- int index_lsb, index_msb, tmp;
+ int index_msb, tmp;
int cpu = smp_processor_id();
if (!cpu_has(c, X86_FEATURE_HT))
@@ -446,7 +446,6 @@
if (smp_num_siblings == 1) {
printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
} else if (smp_num_siblings > 1 ) {
- index_lsb = 0;
index_msb = 31;
if (smp_num_siblings > NR_CPUS) {
@@ -455,21 +454,34 @@
return;
}
tmp = smp_num_siblings;
- while ((tmp & 1) == 0) {
- tmp >>=1 ;
- index_lsb++;
- }
- tmp = smp_num_siblings;
while ((tmp & 0x80000000 ) == 0) {
tmp <<=1 ;
index_msb--;
}
- if (index_lsb != index_msb )
+ if (smp_num_siblings & (smp_num_siblings - 1))
index_msb++;
phys_proc_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb);
printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
phys_proc_id[cpu]);
+
+ smp_num_siblings = smp_num_siblings / c->x86_num_cores;
+
+ tmp = smp_num_siblings;
+ index_msb = 31;
+ while ((tmp & 0x80000000) == 0) {
+ tmp <<=1 ;
+ index_msb--;
+ }
+
+ if (smp_num_siblings & (smp_num_siblings - 1))
+ index_msb++;
+
+ cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb);
+
+ if (c->x86_num_cores > 1)
+ printk(KERN_INFO "CPU: Processor Core ID: %d\n",
+ cpu_core_id[cpu]);
}
}
#endif
Index: arch/i386/kernel/cpu/intel.c
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/arch/i386/kernel/cpu/intel.c
(mode:100644 sha1:4b3838e637455712efc6be4fd4aad49cb1fcba0a)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/arch/i386/kernel/cpu/intel.c
(mode:100644 sha1:de319065aebce1ebeae35a0737c5f5f120667616)
@@ -77,6 +77,27 @@
}
+/*
+ * find out the number of processor cores on the die
+ */
+static int __init num_cpu_cores(struct cpuinfo_x86 *c)
+{
+ unsigned int eax;
+
+ if (c->cpuid_level < 4)
+ return 1;
+
+ __asm__("cpuid"
+ : "=a" (eax)
+ : "0" (4), "c" (0)
+ : "bx", "dx");
+
+ if (eax & 0x1f)
+ return ((eax >> 26) + 1);
+ else
+ return 1;
+}
+
static void __init init_intel(struct cpuinfo_x86 *c)
{
unsigned int l2 = 0;
@@ -139,6 +160,8 @@
if ( p )
strcpy(c->x86_model_id, p);
+ c->x86_num_cores = num_cpu_cores(c);
+
detect_ht(c);
/* Work around errata */
Index: arch/i386/kernel/cpu/proc.c
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/arch/i386/kernel/cpu/proc.c
(mode:100644 sha1:413c1d09091c83c77458669e9c56d87d97a789b4)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/arch/i386/kernel/cpu/proc.c
(mode:100644 sha1:c92e32fecb8abbae68ec53f8334e5142c8844236)
@@ -129,6 +129,14 @@
seq_printf(m, "\nbogomips\t: %lu.%02lu\n\n",
c->loops_per_jiffy/(500000/HZ),
(c->loops_per_jiffy/(5000/HZ)) % 100);
+
+#ifdef CONFIG_SMP
+ /* Put new fields at the end to lower the probability of
+ breaking user space parsers. */
+ seq_printf(m, "core id\t\t: %d\n", cpu_core_id[n]);
+ seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
+#endif
+
return 0;
}
Index: arch/i386/kernel/smpboot.c
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/arch/i386/kernel/smpboot.c
(mode:100644 sha1:5941af26ba1578f20c040c69fbc0af2d8f4c645b)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/arch/i386/kernel/smpboot.c
(mode:100644 sha1:c2888e94a37d5b3ba351f036802d7c65e1e8f33e)
@@ -62,6 +62,8 @@
int smp_num_siblings = 1;
int phys_proc_id[NR_CPUS]; /* Package ID of each logical CPU */
EXPORT_SYMBOL(phys_proc_id);
+int cpu_core_id[NR_CPUS]; /* Core ID of each logical CPU */
+EXPORT_SYMBOL(cpu_core_id);
/* bitmap of online cpus */
cpumask_t cpu_online_map;
@@ -885,6 +887,7 @@
void *xquad_portio;
cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned;
+cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
static void __init smp_boot_cpus(unsigned int max_cpus)
{
@@ -907,6 +910,9 @@
cpus_clear(cpu_sibling_map[0]);
cpu_set(0, cpu_sibling_map[0]);
+ cpus_clear(cpu_core_map[0]);
+ cpu_set(0, cpu_core_map[0]);
+
/*
* If we couldn't find an SMP configuration at boot time,
* get out of here now!
@@ -919,6 +925,8 @@
printk(KERN_NOTICE "Local APIC not detected."
" Using dummy APIC emulation.\n");
map_cpu_to_logical_apicid();
+ cpu_set(0, cpu_sibling_map[0]);
+ cpu_set(0, cpu_core_map[0]);
return;
}
@@ -942,6 +950,8 @@
printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell
your hw vendor)\n");
smpboot_clear_io_apic_irqs();
phys_cpu_present_map = physid_mask_of_physid(0);
+ cpu_set(0, cpu_sibling_map[0]);
+ cpu_set(0, cpu_core_map[0]);
return;
}
@@ -955,6 +965,8 @@
printk(KERN_INFO "SMP mode deactivated, forcing use of dummy
APIC emulation.\n");
smpboot_clear_io_apic_irqs();
phys_cpu_present_map = physid_mask_of_physid(0);
+ cpu_set(0, cpu_sibling_map[0]);
+ cpu_set(0, cpu_core_map[0]);
return;
}
@@ -1035,10 +1047,13 @@
* construct cpu_sibling_map[], so that we can tell sibling CPUs
* efficiently.
*/
- for (cpu = 0; cpu < NR_CPUS; cpu++)
+ for (cpu = 0; cpu < NR_CPUS; cpu++) {
cpus_clear(cpu_sibling_map[cpu]);
+ cpus_clear(cpu_core_map[cpu]);
+ }
for (cpu = 0; cpu < NR_CPUS; cpu++) {
+ struct cpuinfo_x86 *c = cpu_data + cpu;
int siblings = 0;
int i;
if (!cpu_isset(cpu, cpu_callout_map))
@@ -1048,7 +1063,7 @@
for (i = 0; i < NR_CPUS; i++) {
if (!cpu_isset(i, cpu_callout_map))
continue;
- if (phys_proc_id[cpu] == phys_proc_id[i]) {
+ if (cpu_core_id[cpu] == cpu_core_id[i]) {
siblings++;
cpu_set(i, cpu_sibling_map[cpu]);
}
@@ -1060,6 +1075,18 @@
if (siblings != smp_num_siblings)
printk(KERN_WARNING "WARNING: %d siblings found for
CPU%d, should be %d\n", siblings, cpu, smp_num_siblings);
+
+ if (c->x86_num_cores > 1) {
+ for (i = 0; i < NR_CPUS; i++) {
+ if (!cpu_isset(i, cpu_callout_map))
+ continue;
+ if (phys_proc_id[cpu] == phys_proc_id[i]) {
+ cpu_set(i, cpu_core_map[cpu]);
+ }
+ }
+ } else {
+ cpu_core_map[cpu] = cpu_sibling_map[cpu];
+ }
}
if (nmi_watchdog == NMI_LOCAL_APIC)
Index: arch/x86_64/kernel/setup.c
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/arch/x86_64/kernel/setup.c
(mode:100644 sha1:02b85fef14ba16c052ce3755bae2f7c6ad17545e)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/arch/x86_64/kernel/setup.c
(mode:100644 sha1:c485bfa6a804c8e68ac44661655241e3bd3d7cd8)
@@ -774,7 +774,7 @@
{
#ifdef CONFIG_SMP
u32 eax, ebx, ecx, edx;
- int index_lsb, index_msb, tmp;
+ int index_msb, tmp;
int cpu = smp_processor_id();
if (!cpu_has(c, X86_FEATURE_HT))
@@ -786,7 +786,6 @@
if (smp_num_siblings == 1) {
printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
} else if (smp_num_siblings > 1) {
- index_lsb = 0;
index_msb = 31;
/*
* At this point we only support two siblings per
@@ -798,21 +797,33 @@
return;
}
tmp = smp_num_siblings;
- while ((tmp & 1) == 0) {
- tmp >>=1 ;
- index_lsb++;
- }
- tmp = smp_num_siblings;
while ((tmp & 0x80000000 ) == 0) {
tmp <<=1 ;
index_msb--;
}
- if (index_lsb != index_msb )
+ if (smp_num_siblings & (smp_num_siblings - 1))
index_msb++;
phys_proc_id[cpu] = phys_pkg_id(index_msb);
printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
phys_proc_id[cpu]);
+
+ smp_num_siblings = smp_num_siblings / c->x86_num_cores;
+
+ tmp = smp_num_siblings;
+ index_msb = 31;
+ while ((tmp & 0x80000000) == 0) {
+ tmp <<=1 ;
+ index_msb--;
+ }
+ if (smp_num_siblings & (smp_num_siblings - 1))
+ index_msb++;
+
+ cpu_core_id[cpu] = phys_pkg_id(index_msb);
+
+ if (c->x86_num_cores > 1)
+ printk(KERN_INFO "CPU: Processor Core ID: %d\n",
+ cpu_core_id[cpu]);
}
#endif
}
@@ -829,7 +840,28 @@
smp_num_siblings = 1;
#endif
}
-
+
+/*
+ * find out the number of processor cores on the die
+ */
+static int __init intel_num_cpu_cores(struct cpuinfo_x86 *c)
+{
+ unsigned int eax;
+
+ if (c->cpuid_level < 4)
+ return 1;
+
+ __asm__("cpuid"
+ : "=a" (eax)
+ : "0" (4), "c" (0)
+ : "bx", "dx");
+
+ if (eax & 0x1f)
+ return ((eax >> 26) + 1);
+ else
+ return 1;
+}
+
static void __init init_intel(struct cpuinfo_x86 *c)
{
/* Cache sizes */
@@ -847,6 +879,7 @@
c->x86_cache_alignment = c->x86_clflush_size * 2;
if (c->x86 >= 15)
set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
+ c->x86_num_cores = intel_num_cpu_cores(c);
}
void __init get_cpu_vendor(struct cpuinfo_x86 *c)
@@ -1153,13 +1186,16 @@
seq_printf(m, " [%d]", i);
}
}
- seq_printf(m, "\n");
- if (c->x86_num_cores > 1)
- seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
-
- seq_printf(m, "\n\n");
+ seq_printf(m, "\n");
+#ifdef CONFIG_SMP
+ /* Put new fields at the end to lower the probability of
+ breaking user space parsers. */
+ seq_printf(m, "core id\t\t: %d\n", cpu_core_id[c - cpu_data]);
+ seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
+#endif
+ seq_printf(m, "\n");
return 0;
}
Index: arch/x86_64/kernel/smpboot.c
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/arch/x86_64/kernel/smpboot.c
(mode:100644 sha1:b25aa4d4677cb57009879a90401237714994dfe2)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/arch/x86_64/kernel/smpboot.c
(mode:100644 sha1:a8028f128a7488c922afdfc6f974c4c21bd67d68)
@@ -58,7 +58,10 @@
int smp_num_siblings = 1;
/* Package ID of each logical CPU */
u8 phys_proc_id[NR_CPUS] = { [0 ... NR_CPUS-1] = BAD_APICID };
+/* Core ID of each logical CPU */
+u8 cpu_core_id[NR_CPUS] = { [0 ... NR_CPUS-1] = BAD_APICID };
EXPORT_SYMBOL(phys_proc_id);
+EXPORT_SYMBOL(cpu_core_id);
/* Bitmask of currently online CPUs */
cpumask_t cpu_online_map;
@@ -71,6 +74,7 @@
struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned;
+cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
/*
* Trampoline 80x86 program as an array.
@@ -713,6 +717,7 @@
io_apic_irqs = 0;
cpu_online_map = cpumask_of_cpu(0);
cpu_set(0, cpu_sibling_map[0]);
+ cpu_set(0, cpu_core_map[0]);
phys_cpu_present_map = physid_mask_of_physid(0);
if (APIC_init_uniprocessor())
printk(KERN_NOTICE "Local APIC not detected."
@@ -740,6 +745,7 @@
io_apic_irqs = 0;
cpu_online_map = cpumask_of_cpu(0);
cpu_set(0, cpu_sibling_map[0]);
+ cpu_set(0, cpu_core_map[0]);
phys_cpu_present_map = physid_mask_of_physid(0);
disable_apic = 1;
goto smp_done;
@@ -756,6 +762,7 @@
io_apic_irqs = 0;
cpu_online_map = cpumask_of_cpu(0);
cpu_set(0, cpu_sibling_map[0]);
+ cpu_set(0, cpu_core_map[0]);
phys_cpu_present_map = physid_mask_of_physid(0);
disable_apic = 1;
goto smp_done;
@@ -833,10 +840,13 @@
* Construct cpu_sibling_map[], so that we can tell the
* sibling CPU efficiently.
*/
- for (cpu = 0; cpu < NR_CPUS; cpu++)
+ for (cpu = 0; cpu < NR_CPUS; cpu++) {
cpus_clear(cpu_sibling_map[cpu]);
+ cpus_clear(cpu_core_map[cpu]);
+ }
for (cpu = 0; cpu < NR_CPUS; cpu++) {
+ struct cpuinfo_x86 *c = cpu_data + cpu;
int siblings = 0;
int i;
if (!cpu_isset(cpu, cpu_callout_map))
@@ -846,7 +856,7 @@
for (i = 0; i < NR_CPUS; i++) {
if (!cpu_isset(i, cpu_callout_map))
continue;
- if (phys_proc_id[cpu] == phys_proc_id[i]) {
+ if (phys_proc_id[cpu] == cpu_core_id[i]) {
siblings++;
cpu_set(i, cpu_sibling_map[cpu]);
}
@@ -862,6 +872,16 @@
siblings, cpu, smp_num_siblings);
smp_num_siblings = siblings;
}
+ if (c->x86_num_cores > 1) {
+ for (i = 0; i < NR_CPUS; i++) {
+ if (!cpu_isset(i, cpu_callout_map))
+ continue;
+ if (phys_proc_id[cpu] == phys_proc_id[i]) {
+ cpu_set(i, cpu_core_map[cpu]);
+ }
+ }
+ } else
+ cpu_core_map[cpu] = cpu_sibling_map[cpu];
}
Dprintk("Boot done.\n");
Index: include/asm-i386/processor.h
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/include/asm-i386/processor.h
(mode:100644 sha1:84bba5efecb89ba86ed1881114d75f5e26b9c4ad)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/include/asm-i386/processor.h
(mode:100644 sha1:a09ffc982647bdc78c06b82cb20829cf7d059984)
@@ -98,6 +98,7 @@
#endif
extern int phys_proc_id[NR_CPUS];
+extern int cpu_core_id[NR_CPUS];
extern char ignore_fpu_irq;
extern void identify_cpu(struct cpuinfo_x86 *);
Index: include/asm-i386/smp.h
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/include/asm-i386/smp.h
(mode:100644 sha1:cd446c6e068edb3754116de878201334e0eaa061)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/include/asm-i386/smp.h
(mode:100644 sha1:062af23ab49e141934f5b46b1b5b00cd58ea7521)
@@ -35,6 +35,7 @@
extern int pic_mode;
extern int smp_num_siblings;
extern cpumask_t cpu_sibling_map[];
+extern cpumask_t cpu_core_map[];
extern void smp_flush_tlb(void);
extern void smp_message_irq(int cpl, void *dev_id, struct pt_regs *regs);
Index: include/asm-x86_64/smp.h
===================================================================
--- cfdb73ce927133b1b104591cd8a87a337266ac3c/include/asm-x86_64/smp.h
(mode:100644 sha1:a8f76ea1af38598b888f2496623b831232fb8229)
+++ f01fab00ff42b55a46ac8662257cdeba217ba449/include/asm-x86_64/smp.h
(mode:100644 sha1:ec1ef9f39a58bac4c1720468c26d442b7aa7aeb7)
@@ -48,7 +48,9 @@
extern void zap_low_mappings(void);
void smp_stop_cpu(void);
extern cpumask_t cpu_sibling_map[NR_CPUS];
+extern cpumask_t cpu_core_map[NR_CPUS];
extern u8 phys_proc_id[NR_CPUS];
+extern u8 cpu_core_id[NR_CPUS];
#define SMP_TRAMPOLINE_BASE 0x6000
-
To unsubscribe from this list: send the line "unsubscribe bk-commits-head" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
