tree 45aa82e35c209339693f0224f526f825485d9d85
parent d3d191eb408f97584798fc75bc1714a445341c7c
author Andi Kleen <[EMAIL PROTECTED]> Tue Apr 12 08:25:49 2005
committer Linus Torvalds <[EMAIL PROTECTED]> Tue Apr 12 08:25:49 2005
[PATCH] x86_64: Rename the extended cpuid level field
It was confusingly named.
Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
DESC
x86_64: Switch SMP bootup over to new CPU hotplug state machine
EDESC
From: "Andi Kleen" <[EMAIL PROTECTED]>
This will allow hotplug CPU in the future and in general cleans up a lot of
crufty code. It also should plug some races that the old hackish way
introduces. Remove one old race workaround in NMI watchdog setup that is not
needed anymore.
I removed the old total sum of bogomips reporting code. The brag value of
BogoMips has been greatly devalued in the last years on the open market.
Real CPU hotplug will need some more work, but the infrastructure for it is
there now.
One drawback: the new TSC sync algorithm is less accurate than before. The
old way of zeroing TSCs is too intrusive to do later. Instead the TSC of the
BP is duplicated now, which is less accurate.
Cc: <[EMAIL PROTECTED]>
Cc: <[EMAIL PROTECTED]>
Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
arch/x86_64/kernel/setup.c | 13 ++++++-------
include/asm-x86_64/processor.h | 2 +-
2 files changed, 7 insertions(+), 8 deletions(-)
Index: arch/x86_64/kernel/setup.c
===================================================================
--- 504f2170d28c9c6068ac46592e4d6088ec81737c/arch/x86_64/kernel/setup.c
(mode:100644 sha1:10b78bc7f89bf4187447408b2542a9abd13c84f3)
+++ 45aa82e35c209339693f0224f526f825485d9d85/arch/x86_64/kernel/setup.c
(mode:100644 sha1:f0152115876406e8d2f147263e8df22999b5b72a)
@@ -673,7 +673,7 @@
{
unsigned int *v;
- if (c->x86_cpuid_level < 0x80000004)
+ if (c->extended_cpuid_level < 0x80000004)
return 0;
v = (unsigned int *) c->x86_model_id;
@@ -689,7 +689,7 @@
{
unsigned int n, dummy, eax, ebx, ecx, edx;
- n = c->x86_cpuid_level;
+ n = c->extended_cpuid_level;
if (n >= 0x80000005) {
cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
@@ -781,7 +781,7 @@
}
display_cacheinfo(c);
- if (c->x86_cpuid_level >= 0x80000008) {
+ if (c->extended_cpuid_level >= 0x80000008) {
c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
if (c->x86_num_cores & (c->x86_num_cores - 1))
c->x86_num_cores = 1;
@@ -841,7 +841,6 @@
if (smp_num_siblings & (smp_num_siblings - 1))
index_msb++;
- /* RED-PEN surely this must run in the non HT case too! -AK */
cpu_core_id[cpu] = phys_pkg_id(index_msb);
if (c->x86_num_cores > 1)
@@ -878,7 +877,7 @@
unsigned n;
init_intel_cacheinfo(c);
- n = c->x86_cpuid_level;
+ n = c->extended_cpuid_level;
if (n >= 0x80000008) {
unsigned eax = cpuid_eax(0x80000008);
c->x86_virt_bits = (eax >> 8) & 0xff;
@@ -927,7 +926,7 @@
c->x86_cache_alignment = c->x86_clflush_size;
c->x86_num_cores = 1;
c->x86_apicid = c == &boot_cpu_data ? 0 : c - cpu_data;
- c->x86_cpuid_level = 0;
+ c->extended_cpuid_level = 0;
memset(&c->x86_capability, 0, sizeof c->x86_capability);
/* Get vendor name */
@@ -974,7 +973,7 @@
/* AMD-defined flags: level 0x80000001 */
xlvl = cpuid_eax(0x80000000);
- c->x86_cpuid_level = xlvl;
+ c->extended_cpuid_level = xlvl;
if ((xlvl & 0xffff0000) == 0x80000000) {
if (xlvl >= 0x80000001) {
c->x86_capability[1] = cpuid_edx(0x80000001);
Index: include/asm-x86_64/processor.h
===================================================================
--- 504f2170d28c9c6068ac46592e4d6088ec81737c/include/asm-x86_64/processor.h
(mode:100644 sha1:ad52f82740d3f201d9596f443cb788a505729c8e)
+++ 45aa82e35c209339693f0224f526f825485d9d85/include/asm-x86_64/processor.h
(mode:100644 sha1:93c34b87b42ef16b49649f563b3471056bded7db)
@@ -64,7 +64,7 @@
__u8 x86_num_cores;
__u8 x86_apicid;
__u32 x86_power;
- __u32 x86_cpuid_level; /* Max CPUID function supported */
+ __u32 extended_cpuid_level; /* Max extended CPUID function
supported */
unsigned long loops_per_jiffy;
} ____cacheline_aligned;
-
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