tree d8736596d79bf95281449f7fe5f72db111eb5a73
parent 652a12ef98d16ccd1ee5cdf2c832ce5411ed3262
author Russell King <[EMAIL PROTECTED]> Sun, 17 Apr 2005 15:51:02 +0100
committer Russell King <[EMAIL PROTECTED]> Sun, 17 Apr 2005 15:51:02 +0100
[PATCH] ARM: bitops
Convert ARM bitop assembly to a macro. All bitops follow the same
format, so it's silly duplicating the code when only one or two
instructions are different.
Signed-off-by: Russell King <[EMAIL PROTECTED]>
arm/lib/changebit.S | 11 ++---------
arm/lib/clearbit.S | 13 ++-----------
arm/lib/setbit.S | 11 ++---------
arm/lib/testchangebit.S | 15 ++-------------
arm/lib/testclearbit.S | 15 ++-------------
arm/lib/testsetbit.S | 15 ++-------------
6 files changed, 12 insertions(+), 68 deletions(-)
Index: arch/arm/lib/changebit.S
===================================================================
--- fb4202396bed56574c68f5b516eeb85846e88c6a/arch/arm/lib/changebit.S
(mode:100644 sha1:3af45cab70e1e0c402674362b00738b03b9f44d3)
+++ d8736596d79bf95281449f7fe5f72db111eb5a73/arch/arm/lib/changebit.S
(mode:100644 sha1:389567c2409026d7d1096e4edf53229241203cb2)
@@ -9,6 +9,7 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
+#include "bitops.h"
.text
/* Purpose : Function to change a bit
@@ -17,12 +18,4 @@
ENTRY(_change_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_change_bit_le)
- and r2, r0, #7
- mov r3, #1
- mov r3, r3, lsl r2
- save_and_disable_irqs ip, r2
- ldrb r2, [r1, r0, lsr #3]
- eor r2, r2, r3
- strb r2, [r1, r0, lsr #3]
- restore_irqs ip
- RETINSTR(mov,pc,lr)
+ bitop eor
Index: arch/arm/lib/clearbit.S
===================================================================
--- fb4202396bed56574c68f5b516eeb85846e88c6a/arch/arm/lib/clearbit.S
(mode:100644 sha1:069a2ce413f052e4ed56dde5b13b2f2074dab27f)
+++ d8736596d79bf95281449f7fe5f72db111eb5a73/arch/arm/lib/clearbit.S
(mode:100644 sha1:34751653302559abba02cd82290a2c2f255322d9)
@@ -9,6 +9,7 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
+#include "bitops.h"
.text
/*
@@ -18,14 +19,4 @@
ENTRY(_clear_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_clear_bit_le)
- and r2, r0, #7
- mov r3, #1
- mov r3, r3, lsl r2
- save_and_disable_irqs ip, r2
- ldrb r2, [r1, r0, lsr #3]
- bic r2, r2, r3
- strb r2, [r1, r0, lsr #3]
- restore_irqs ip
- RETINSTR(mov,pc,lr)
-
-
+ bitop bic
Index: arch/arm/lib/setbit.S
===================================================================
--- fb4202396bed56574c68f5b516eeb85846e88c6a/arch/arm/lib/setbit.S
(mode:100644 sha1:8f337df5d99be0de009b469ff72225a321d0bbe2)
+++ d8736596d79bf95281449f7fe5f72db111eb5a73/arch/arm/lib/setbit.S
(mode:100644 sha1:83bc23d5b0374dd377772aefee4b47cf7841cc85)
@@ -9,6 +9,7 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
+#include "bitops.h"
.text
/*
@@ -18,12 +19,4 @@
ENTRY(_set_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_set_bit_le)
- and r2, r0, #7
- mov r3, #1
- mov r3, r3, lsl r2
- save_and_disable_irqs ip, r2
- ldrb r2, [r1, r0, lsr #3]
- orr r2, r2, r3
- strb r2, [r1, r0, lsr #3]
- restore_irqs ip
- RETINSTR(mov,pc,lr)
+ bitop orr
Index: arch/arm/lib/testchangebit.S
===================================================================
--- fb4202396bed56574c68f5b516eeb85846e88c6a/arch/arm/lib/testchangebit.S
(mode:100644 sha1:4aba4676b984c9915ed12125a6b0cd27217c107a)
+++ d8736596d79bf95281449f7fe5f72db111eb5a73/arch/arm/lib/testchangebit.S
(mode:100644 sha1:b25dcd2be53ec6fc2cba40329890899d35c5a051)
@@ -9,21 +9,10 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
+#include "bitops.h"
.text
ENTRY(_test_and_change_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_test_and_change_bit_le)
- add r1, r1, r0, lsr #3
- and r3, r0, #7
- mov r0, #1
- save_and_disable_irqs ip, r2
- ldrb r2, [r1]
- tst r2, r0, lsl r3
- eor r2, r2, r0, lsl r3
- strb r2, [r1]
- restore_irqs ip
- moveq r0, #0
- RETINSTR(mov,pc,lr)
-
-
+ testop eor, strb
Index: arch/arm/lib/testclearbit.S
===================================================================
--- fb4202396bed56574c68f5b516eeb85846e88c6a/arch/arm/lib/testclearbit.S
(mode:100644 sha1:e07c5bd24307152bcb19975168eb32870cf1f33e)
+++ d8736596d79bf95281449f7fe5f72db111eb5a73/arch/arm/lib/testclearbit.S
(mode:100644 sha1:2dcc4b16b68ea734da457145ab0718998759d441)
@@ -9,21 +9,10 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
+#include "bitops.h"
.text
ENTRY(_test_and_clear_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_test_and_clear_bit_le)
- add r1, r1, r0, lsr #3 @ Get byte offset
- and r3, r0, #7 @ Get bit offset
- mov r0, #1
- save_and_disable_irqs ip, r2
- ldrb r2, [r1]
- tst r2, r0, lsl r3
- bic r2, r2, r0, lsl r3
- strb r2, [r1]
- restore_irqs ip
- moveq r0, #0
- RETINSTR(mov,pc,lr)
-
-
+ testop bicne, strneb
Index: arch/arm/lib/testsetbit.S
===================================================================
--- fb4202396bed56574c68f5b516eeb85846e88c6a/arch/arm/lib/testsetbit.S
(mode:100644 sha1:a570fc74cddd76a2148acaaad5856536d95997a8)
+++ d8736596d79bf95281449f7fe5f72db111eb5a73/arch/arm/lib/testsetbit.S
(mode:100644 sha1:9011c969761aa61fec07ccf5298909c85345664c)
@@ -9,21 +9,10 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
+#include "bitops.h"
.text
ENTRY(_test_and_set_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_test_and_set_bit_le)
- add r1, r1, r0, lsr #3 @ Get byte offset
- and r3, r0, #7 @ Get bit offset
- mov r0, #1
- save_and_disable_irqs ip, r2
- ldrb r2, [r1]
- tst r2, r0, lsl r3
- orr r2, r2, r0, lsl r3
- strb r2, [r1]
- restore_irqs ip
- moveq r0, #0
- RETINSTR(mov,pc,lr)
-
-
+ testop orreq, streqb
-
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