tree 48749281a9a6f4e8da9ad3d0e8dd3c88c114f723
parent 16acbc624e2b7b750570cb672341d05a816051f4
author Eugene Surovegin <[EMAIL PROTECTED]> Sun, 17 Apr 2005 05:24:15 -0700
committer Linus Torvalds <[EMAIL PROTECTED]> Sun, 17 Apr 2005 05:24:15 -0700
[PATCH] ppc32: ppc4xx_pic - add acknowledge when enabling level-sensitive IRQ
This patch adds interrupt acknowledge to the PPC4xx PIC enable_irq
implementation for level-sensitive IRQ sources. This helps in cases when
enable/disable_irq is used in interrupt handlers for hardware, which
requires IRQ acknowledge to be issued from non-interrupt context (e.g.
when actual ACK in device needs an I2C transaction). For such strange
hardware, interrupt handler disables IRQ and defers actual ACK to some
other context. When this happens, IRQ is enabled again. For
level-sensitive sources we get spurious triggering right after IRQ is
enabled. This patch fixes this.
Suggested by Tolunay Orkun <[EMAIL PROTECTED]>.
Signed-off-by: Eugene Surovegin <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
ppc/syslib/ppc4xx_pic.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletion(-)
Index: arch/ppc/syslib/ppc4xx_pic.c
===================================================================
--- ca337baa5a2950ae6a3ff8eb19ac5ae15cbb70c5/arch/ppc/syslib/ppc4xx_pic.c
(mode:100644 sha1:08f06dd17e7baa20ceafffe6ed3a6e40d38cd813)
+++ 48749281a9a6f4e8da9ad3d0e8dd3c88c114f723/arch/ppc/syslib/ppc4xx_pic.c
(mode:100644 sha1:05686fa73545bf83838a91c605c19e0860e36465)
@@ -41,7 +41,10 @@
#define UIC_HANDLERS(n)
\
static void ppc4xx_uic##n##_enable(unsigned int irq) \
{ \
- ppc_cached_irq_mask[n] |= IRQ_MASK_UIC##n(irq); \
+ u32 mask = IRQ_MASK_UIC##n(irq); \
+ if (irq_desc[irq].status & IRQ_LEVEL) \
+ mtdcr(DCRN_UIC_SR(UIC##n), mask); \
+ ppc_cached_irq_mask[n] |= mask; \
mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \
} \
\
-
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