tree da5e44dd66c8535eeeafe4ab7835627a401abc1a
parent 48bb35831bb0344abc9aecb39467fd006b2f5d7d
author Jason Gaston <[EMAIL PROTECTED]> Sun, 17 Apr 2005 05:24:41 -0700
committer Linus Torvalds <[EMAIL PROTECTED]> Sun, 17 Apr 2005 05:24:41 -0700
[PATCH] irq and pci_ids: patch for Intel ESB2
This patch adds the Intel ESB2 DID's to the irq.c and pci_ids.h files.
Signed-off-by: Jason Gaston <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
i386/pci/irq.c | 1 +
linux/pci_ids.h | 31 +++++++++++++++++++++++++++++++
2 files changed, 32 insertions(+)
Index: arch/i386/pci/irq.c
===================================================================
--- 22804473850c9b47c3e0fc182732d1e7ef5ed951/arch/i386/pci/irq.c (mode:100644
sha1:1128451b5d742bae4dffd6017fb0ce41f02c67b9)
+++ da5e44dd66c8535eeeafe4ab7835627a401abc1a/arch/i386/pci/irq.c (mode:100644
sha1:e07589d04f64ed259af4997d8e30ce1caa379288)
@@ -495,6 +495,7 @@
case PCI_DEVICE_ID_INTEL_ICH6_1:
case PCI_DEVICE_ID_INTEL_ICH7_0:
case PCI_DEVICE_ID_INTEL_ICH7_1:
+ case PCI_DEVICE_ID_INTEL_ESB2_0:
r->name = "PIIX/ICH";
r->get = pirq_piix_get;
r->set = pirq_piix_set;
Index: include/linux/pci_ids.h
===================================================================
--- 22804473850c9b47c3e0fc182732d1e7ef5ed951/include/linux/pci_ids.h
(mode:100644 sha1:de33f6724867e68da262bac9e5372e1656f30e3b)
+++ da5e44dd66c8535eeeafe4ab7835627a401abc1a/include/linux/pci_ids.h
(mode:100644 sha1:f1f75fde8cd46d668b5fe68b64259939a0f0f17a)
@@ -2391,6 +2391,25 @@
#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d
#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e
#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f
+#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670
+#define PCI_DEVICE_ID_INTEL_ESB2_1 0x2680
+#define PCI_DEVICE_ID_INTEL_ESB2_2 0x2681
+#define PCI_DEVICE_ID_INTEL_ESB2_3 0x2682
+#define PCI_DEVICE_ID_INTEL_ESB2_4 0x2683
+#define PCI_DEVICE_ID_INTEL_ESB2_5 0x2688
+#define PCI_DEVICE_ID_INTEL_ESB2_6 0x2689
+#define PCI_DEVICE_ID_INTEL_ESB2_7 0x268a
+#define PCI_DEVICE_ID_INTEL_ESB2_8 0x268b
+#define PCI_DEVICE_ID_INTEL_ESB2_9 0x268c
+#define PCI_DEVICE_ID_INTEL_ESB2_10 0x2690
+#define PCI_DEVICE_ID_INTEL_ESB2_11 0x2692
+#define PCI_DEVICE_ID_INTEL_ESB2_12 0x2694
+#define PCI_DEVICE_ID_INTEL_ESB2_13 0x2696
+#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698
+#define PCI_DEVICE_ID_INTEL_ESB2_15 0x2699
+#define PCI_DEVICE_ID_INTEL_ESB2_16 0x269a
+#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b
+#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e
#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8
#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9
#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0
@@ -2415,6 +2434,18 @@
#define PCI_DEVICE_ID_INTEL_ICH7_22 0x27e0
#define PCI_DEVICE_ID_INTEL_ICH7_23 0x27e2
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
+#define PCI_DEVICE_ID_INTEL_ESB2_19 0x3500
+#define PCI_DEVICE_ID_INTEL_ESB2_20 0x3501
+#define PCI_DEVICE_ID_INTEL_ESB2_21 0x3504
+#define PCI_DEVICE_ID_INTEL_ESB2_22 0x3505
+#define PCI_DEVICE_ID_INTEL_ESB2_23 0x350c
+#define PCI_DEVICE_ID_INTEL_ESB2_24 0x350d
+#define PCI_DEVICE_ID_INTEL_ESB2_25 0x3510
+#define PCI_DEVICE_ID_INTEL_ESB2_26 0x3511
+#define PCI_DEVICE_ID_INTEL_ESB2_27 0x3514
+#define PCI_DEVICE_ID_INTEL_ESB2_28 0x3515
+#define PCI_DEVICE_ID_INTEL_ESB2_29 0x3518
+#define PCI_DEVICE_ID_INTEL_ESB2_30 0x3519
#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580
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