tree e622228e8fd43e1461ea525afa453fbcddc39125
parent ff645bec523819fa4d28d7e0de7d998e3edb0c57
author Michael Chan <[EMAIL PROTECTED]> Fri, 22 Apr 2005 07:10:36 -0700
committer David S. Miller <[EMAIL PROTECTED]> Fri, 22 Apr 2005 07:10:36 -0700
[TG3]: Add GPIO3 for 5752
Add bit definitions for the new GPIO3 in 5752. GPIO3 must be driven as
output when it is unused.
Signed-off-by: Michael Chan <[EMAIL PROTECTED]>
Signed-off-by: David S. Miller <[EMAIL PROTECTED]>
net/tg3.c | 10 ++++++++++
net/tg3.h | 3 +++
2 files changed, 13 insertions(+)
Index: drivers/net/tg3.c
===================================================================
--- b1f7bff1f67465f53adf9906d73d87412edfa876/drivers/net/tg3.c (mode:100644
sha1:a4d0d61d6af051a72638f63b67b83471a1d6a88e)
+++ e622228e8fd43e1461ea525afa453fbcddc39125/drivers/net/tg3.c (mode:100644
sha1:a94631af21cd5a10bddf164ff7736c0b0eb5fa15)
@@ -5353,6 +5353,11 @@ static int tg3_reset_hw(struct tg3 *tp)
gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE2 |
GRC_LCLCTRL_GPIO_OUTPUT0 | GRC_LCLCTRL_GPIO_OUTPUT2;
+
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
+ gpio_mask |= GRC_LCLCTRL_GPIO_OE3 |
+ GRC_LCLCTRL_GPIO_OUTPUT3;
+
tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
/* GPIO1 must be driven high for eeprom write protect */
@@ -8077,6 +8082,11 @@ static int __devinit tg3_get_invariants(
(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT))
tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
GRC_LCLCTRL_GPIO_OUTPUT1);
+ /* Unused GPIO3 must be driven as output on 5752 because there
+ * are no pull-up resistors on unused GPIO pins.
+ */
+ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
+ tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
/* Force the chip into D0. */
err = tg3_set_power_state(tp, 0);
Index: drivers/net/tg3.h
===================================================================
--- b1f7bff1f67465f53adf9906d73d87412edfa876/drivers/net/tg3.h (mode:100644
sha1:3f7cd6fb8891a4148a4163671064fbe94f0016c0)
+++ e622228e8fd43e1461ea525afa453fbcddc39125/drivers/net/tg3.h (mode:100644
sha1:548f469e9500720b82d9c748ce1b6e69be610e1a)
@@ -1311,6 +1311,9 @@
#define GRC_LCLCTRL_CLEARINT 0x00000002
#define GRC_LCLCTRL_SETINT 0x00000004
#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008
+#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020
+#define GRC_LCLCTRL_GPIO_OE3 0x00000040
+#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080
#define GRC_LCLCTRL_GPIO_INPUT0 0x00000100
#define GRC_LCLCTRL_GPIO_INPUT1 0x00000200
#define GRC_LCLCTRL_GPIO_INPUT2 0x00000400
-
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