tree c19512eac268e75337d8e1591a11db03dd13cb55
parent f326d22b8cc5bfebfa5b3f6a4066dc737def2234
author Eugene Surovegin <[EMAIL PROTECTED]> Wed, 06 Jul 2005 08:54:45 -0700
committer Linus Torvalds <[EMAIL PROTECTED]> Wed, 06 Jul 2005 09:18:59 -0700
[PATCH] ppc32: explicitly disable 440GP IRQ compatibility mode in 440GX setup
Add explicit disabling of 440GP IRQ compatibility mode when configuring
440GX interrupt controller. This helps when board firmware for some reason
uses this compatibility mode and leaves it enabled. It breaks 440GX
interrupt code because it assumes native 440GX IRQ mode. People seems to
be continuously bitten by this.
Signed-off-by: Eugene Surovegin <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
arch/ppc/syslib/ppc4xx_pic.c | 4 ++++
1 files changed, 4 insertions(+)
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ b/arch/ppc/syslib/ppc4xx_pic.c
@@ -110,6 +110,10 @@ static int ppc4xx_pic_get_irq(struct pt_
static void __init ppc4xx_pic_impl_init(void)
{
+#if defined(CONFIG_440GX)
+ /* Disable 440GP compatibility mode if it was enabled in firmware */
+ SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) & ~DCRN_SDR_MFR_PCM);
+#endif
/* Configure Base UIC */
mtdcr(DCRN_UIC_CR(UICB), 0);
mtdcr(DCRN_UIC_TR(UICB), 0);
-
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