tree d925c9b022866bfac4e1e0ddaff76cbe158bdbbf
parent e7ec02938dbe8ca35b750f29eaa4b12de0b52754
author Russell King <[EMAIL PROTECTED]> Fri, 29 Jul 2005 16:36:48 +0100
committer Russell King <[EMAIL PROTECTED]> Fri, 29 Jul 2005 16:36:48 +0100
[ARM SMP] Ensure secondary CPUs see their pen release
Since the secondary CPUs will not be operating in symetric mode
while they are held in the pen, we need to ensure that the write
to pen_release is visible to them, by flushing the cache.
Signed-off-by: Russell King <[EMAIL PROTECTED]>
arch/arm/mach-integrator/platsmp.c | 2 ++
1 files changed, 2 insertions(+)
diff --git a/arch/arm/mach-integrator/platsmp.c
b/arch/arm/mach-integrator/platsmp.c
--- a/arch/arm/mach-integrator/platsmp.c
+++ b/arch/arm/mach-integrator/platsmp.c
@@ -15,6 +15,7 @@
#include <linux/mm.h>
#include <asm/atomic.h>
+#include <asm/cacheflush.h>
#include <asm/delay.h>
#include <asm/mmu_context.h>
#include <asm/procinfo.h>
@@ -80,6 +81,7 @@ int __cpuinit boot_secondary(unsigned in
* "cpu" is Linux's internal ID.
*/
pen_release = cpu;
+ flush_cache_all();
/*
* XXX
-
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