On Sun, Jan 05, 2014 at 06:51:44PM +0100, Armin K. wrote: > > Now that I've built it as module, the microcode firmware seems to load > just fine and I did notice something: > > dmesg output, early boot - before /sbin/init has been ran: > > [ 0.040548] perf_event_intel: PEBS disabled due to CPU errata, please > upgrade microcode > > dmesg output, after udev has been started and it has loaded the > microcode module: > > [ 10.471604] microcode: CPU0 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.720949] microcode: CPU0 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.722411] microcode: CPU0 updated to revision 0x28, date = 2012-04-24 > [ 10.722486] microcode: CPU1 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.722555] microcode: CPU1 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.723511] microcode: CPU1 updated to revision 0x28, date = 2012-04-24 > [ 10.723549] microcode: CPU2 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.723617] microcode: CPU2 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.724582] microcode: CPU2 updated to revision 0x28, date = 2012-04-24 > [ 10.724596] microcode: CPU3 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.724631] microcode: CPU3 sig=0x206a7, pf=0x10, revision=0x25 > [ 10.725553] microcode: CPU3 updated to revision 0x28, date = 2012-04-24 > [ 10.725573] perf_event_intel: PEBS enabled due to microcode update > [ 10.725673] microcode: Microcode Update Driver: v2.00 > <tig...@aivazian.fsnet.co.uk>, Peter Oruba > > > > I don't know what PEBS is, but in this case, microcode update seems to > enable it. > I knew it was something to do with kernel performance monitoring, (i.e. instrumenting how long is spent in various parts of the code) and eventually found it documented in http://perfmon2.sourceforge.net/pfmon_intel_core.html : Precise Event-Based Sampling.
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