> in non discarding scheduling total delay is conserved, > irrespective of the scheduling discipline
Is that true for all backplane/switching topologies? > The question is if (codel/pie/whatever) AQM makes sense at all for 10G/40G > hardware and higher performance irons? Igress/egress bandwidth is nearly > identical, a larger/longer buffering should not happen. Line card memory is > limited, a larger buffering is defacto excluded. The simplest interesting case is where you have two input lines feeding the same output line. AQM may not be the best solution, but you have to do something. Dropping any packet that won't fit into the buffer is probably simplest. -- These are my opinions. I hate spam. _______________________________________________ Bloat mailing list [email protected] https://lists.bufferbloat.net/listinfo/bloat
