Hi Terry, I agree in that I think this is the next frontier for volunteer computing (after porting to mobile OS's).
Personally, I think that the OpenCL route is the way to go as Altera and Xilinx are both in the process of developing ARM based SoC-FPGAs. Currently, a dual core ARM Cortex-A9 coupled to an FPGA fabric via a high speed on chip interconnect. In this scenario the BOINC manager would be running on the ARM target while the BOINC application could be rewritten with OpenCL hooks that will be generate soft IP for the FPGA. Altera has compilers (c to h) that take in high level languages and synthesize HW components based on the needs of the SW. I have heard acceleration values as much as 100-150x on some applications. So in this case the BOINC manager would load an application such as SETI@Home and then load the pre-compiled soft IP into the FPGA for acceleration. These devices (SoC-FPGAs) will be in everything from set top boxes, routers, base stations, and automotive. http://www.altera.com/devices/processor/arm/cortex-a9/m-arm-cortex-a9.html Anyway, I am glad you started the discussion! Jeff ________________________________ From: Terry Stratoudakis <[email protected]> To: [email protected] Sent: Tuesday, July 10, 2012 2:32 PM Subject: [boinc_dev] FPGA@Home (FPGA and BOINC) Hi all, I saw some old threads on this topic. I took it upon myself to create this blog to help start up this effort. Feedback, collaborators, comments, etc. are all welcome! http://www.fpgaathome.org/ Terry _______________________________________________ boinc_dev mailing list [email protected] http://lists.ssl.berkeley.edu/mailman/listinfo/boinc_dev To unsubscribe, visit the above URL and (near bottom of page) enter your email address. _______________________________________________ boinc_dev mailing list [email protected] http://lists.ssl.berkeley.edu/mailman/listinfo/boinc_dev To unsubscribe, visit the above URL and (near bottom of page) enter your email address.
