This part has been changed in the SBBR spec as we do expect server SoC to support EL3 so we removed the non-PSCI mechanism. Also the PSCI Spec reference is 1.0:
UEFI is defined as a uniprocessor specification that only uses a single CPU core for booting. Platforms providing EL3 must implement the Power State Coordination Interface (PSCI) [5]. This interface will be as the main method to boot secondary cores, implementing CPU idling, and providing reset and shutdown runtime services. ... some ACPI related requirements... All secondary cores remain powered down during boot. After boot, OSPM can call CPU_ON() into the PSCI firmware to power up a chosen core. The PSCI firmware powers up, initializes the core, and starts execution at the provided address. - DW - -----Original Message----- From: [email protected] <[email protected]> On Behalf Of Grant Likely Sent: Friday, May 18, 2018 6:06 AM Cc: [email protected]; nd <[email protected]>; arm.ebbr-discuss <[email protected]> Subject: [Arm.ebbr-discuss] [PATCH] Add chapter for privileged/secure firmware Document the requirements for secure firmware to implement PSCI, particularly in regard to multiprocessor CPU startup protocol. PSCI is by far the preferred solution, but make allowance for the other existing methods. Signed-off-by: Grant Likely <[email protected]> --- source/ebbr.rst | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/source/ebbr.rst b/source/ebbr.rst index 700feba..59af3c9 100644 --- a/source/ebbr.rst +++ b/source/ebbr.rst @@ -309,6 +309,25 @@ the aid of the Operating System. .. note:: This normally requires dedicated storage for UEFI variables that is not directly accessible from the Operating System. +****************************** +Priviledged or Secure Firmware +****************************** + +Multiprocessor Startup Protocol +=============================== +Firmware resident in Trustzone EL3 must implement and conform to the +Power State Coordination Interface specification[PSCI_]. + +Platforms without EL3 must implement one of: + +- PSCI at EL2 (leaving only EL1 available to an operating system) +- MP Startup for Arm[MPSTART_] (ACPI Parking Protocol) on an ACPI +platform +- Linux AArch64 spin tables[LINUXA64BOOT_] on a Devicetree platform + +However, the MP Startup and Spintable protocols are strongly discouraged. +Future versions of this specification will only allow PSCI, and PSCI +should be implemented in all new designs. + **************************************** APPENDIX A - Required UEFI Boot Services **************************************** @@ -542,6 +561,12 @@ EFI_ISCSI_INITIATOR_NAME_PROTOCOL 16.2 .. [DTSPEC] `Devicetree specification v0.2 <https://github.com/devicetree-org/devicetree-specification/releases/tag/v0.2>`_, `Devicetree.org <https://devicetree.org>`_ +.. [LINUXA64BOOT] `Linux Documentation/arm64/booting.txt + <https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/tree/Documentation/arm64/booting.txt>`_, + Linux kernel +.. [MPSTART] `MP Startup for Arm + <https://acpica.org/sites/acpica/files/MP%20Startup%20for%20ARM%20platforms.doc>`_, + 20 December 2012, `Microsoft <http://microsoft.com>`_ .. [PSCI] `Power State Coordination Interface Issue D (PSCI v1.1) <http://infocenter.arm.com/help//topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf>`_, 21 April 2017, `Arm Limited <http://arm.com>`_ -- 2.13.0 _______________________________________________ Arm.ebbr-discuss mailing list [email protected] IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ boot-architecture mailing list [email protected] https://lists.linaro.org/mailman/listinfo/boot-architecture
