Hello, Last week's meeting about HOBs for the DRAM information, I would like to give an example of the Socionext SynQuacer case.
SynQuacer SoC is a bit unique SoC, it consists of 24xCA53(AP) + CM3(SCP), and it uses DIMM cards like PCs. Thus, when initializing the memory, it has to detect the DIMM and initialize it and notify the configuration to BL3X. The SynQuacer boots from SCP and runs SCP firmware on it. The SCP firmware initializes DDR memory and secure memory area. Since the SynQuacer has a GPIO (DIP switch) to enable or disable secure memory, secure memory is dynamically configurable. So, it has a vendor extension of SCMI call to pass that information. https://github.com/ARM-software/SCP-firmware/blob/master/product/synquacer/module/scmi_vendor_ext/src/mod_scmi_vendor_ext.c#L163 When the TF-A is booted by SCP on AP, TF-A calls the SCMI and gets the DDR information, from which the secure memory area is removed. TF-A saved the information on an address, and EDK2 and U-Boot uses it (of course BL33 can issue the SCMI to get the information) [SCP fw] <-(SCMI)-> [TF-A] <-(memory*)-> [U-Boot/EDK2] * it will be updated to use SMC. - The SynQuacer doesn't use Devicetree to pass this information because EDK2 uses ACPI by default. - Secure memory information is not shared. that size and address are fixed in SCP-firmware, TF-A and OP-TEE. Thank you, -- Masami Hiramatsu _______________________________________________ boot-architecture mailing list boot-architecture@lists.linaro.org https://lists.linaro.org/mailman/listinfo/boot-architecture
