On Tue, 2023-05-23 at 09:13 +0000, Zoltán Turányi wrote:
> So here is the idea. What if a subsequent invocation of make (in a
> subdir)– instead of building the target it is given – would just
> parse the makefile, create a full ruleset internally and inject this
> ruleset into the parent make’s ruleset. Then the subsequent
> invocation can simply return and let the parent instance of make
> actually complete the build. This would enable correct
> parallelization with full respect of the dependencies. This can, of
> course only be done if the subsequent invocation of make is the last
> thing its action is doing. (Or one can somehow split the action to
> run the remaining part after the subsequent make’s target is
> complete.)

I didn't have much to add beyond the comments made earlier, except to
say that the right way to implement stuff like this is as non-recursive
make as already discussed.

So the only way a feature like this could be useful, is if it could
allow a recursive build system to get the benefits of a non-recursive
system "for free", without having to undertake the effort of reworking
the makefiles to actually be non-recursive.

However, I think this will be extremely difficult, because makefile
targets are so free-form and prerequisites and targets are not actually
necessary files at all.  If you're talking about the target "all", and
it's redefined in the sub-make, you need to be sure that all references
to that target in the sub-make go to _that_ version of "all", and
references to "all" in a different make go to _those_ versions of
"all".  But, sometimes you do want the parent makefile to be able to
refer to the targets in the child: sometimes you want it to be the same
thing, and sometimes a different thing.

And, you have the same problem with variables, pattern rules, etc. as

Also your implementation is not right; the well-formed parent makefile
would look something like this:

  all: main.o sub1/lib1.o sub2/lib2.o
          ... link $^

  main.o: main.c sub1/lib1.h sub2/lib2.h
          ... compile

  sub1/lib1.o sub2/lib2.o : % : FORCE
          $(MAKE) -C $(@D) $(@F)


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