that did it!
Nick.
On 12/04/11 12:16, Miod Vallat wrote:
> Please try this:
>
> Index: pci/pci_machdep.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/i386/pci/pci_machdep.c,v
> retrieving revision 1.66
> diff -u -p -r1.66 pci_machdep.c
> --- pci/pci_machdep.c 23 Oct 2011 21:18:14 -0000 1.66
> +++ pci/pci_machdep.c 4 Dec 2011 17:16:22 -0000
> @@ -298,17 +298,19 @@ pci_attach_hook(struct device *parent, s
> break;
> }
>
> - /*
> - * Don't enable MSI on a HyperTransport bus. In order to
> - * determine that bus 0 is a HyperTransport bus, we look at
> - * device 24 function 0, which is the HyperTransport
> - * host/primary interface integrated on most 64-bit AMD CPUs.
> - * If that device has a HyperTransport capability, bus 0 must
> - * be a HyperTransport bus and we disable MSI.
> - */
> - tag = pci_make_tag(pc, 0, 24, 0);
> - if (pci_get_capability(pc, tag, PCI_CAP_HT, NULL, NULL))
> - pba->pba_flags &= ~PCI_FLAGS_MSI_ENABLED;
> + if (pci_mode != 2) {
> + /*
> + * Don't enable MSI on a HyperTransport bus. In order to
> + * determine that bus 0 is a HyperTransport bus, we look at
> + * device 24 function 0, which is the HyperTransport
> + * host/primary interface integrated on most 64-bit AMD CPUs.
> + * If that device has a HyperTransport capability, bus 0 must
> + * be a HyperTransport bus and we disable MSI.
> + */
> + tag = pci_make_tag(pc, 0, 24, 0);
> + if (pci_get_capability(pc, tag, PCI_CAP_HT, NULL, NULL))
> + pba->pba_flags &= ~PCI_FLAGS_MSI_ENABLED;
> + }
> }
>
> int
> @@ -318,7 +320,7 @@ pci_bus_maxdevs(pci_chipset_tag_t pc, in
> /*
> * Bus number is irrelevant. If Configuration Mechanism 2 is in
> * use, can only have devices 0-15 on any bus. If Configuration
> - * Mechanism 1 is in use, can have devices 0-32 (i.e. the `normal'
> + * Mechanism 1 is in use, can have devices 0-31 (i.e. the `normal'
> * range).
> */
> if (pci_mode == 2)
