Hello, On 13/11/14(Thu) 15:55, inframare wrote: > [...] > Seem to be having a few issues with xhci on a Gigabyte Brix. > > USB 2 & 3 ports not working with /bsd.rd, had to install manually from > /bsd booted from a full install on USB. > > USB 3 unstable with /bsd, flash storage devices worked on first > insertion and showed good read/write speeds with dd until intermittent > error: > > xhci_abort_xfer: xfer=0xffffff013f6b95a0 err=TIMEOUT
Thanks for the report. I am unfortunately unable to reproduce any of your problems, but I don't have any 1.0 controller, like yours. Could you apply the debug diff below, compile a kernel with XHCI_DEBUG, reproduce your manipulation and send me the corresponding dmesg? TIA, Martin Index: xhci.c =================================================================== RCS file: /cvs/src/sys/dev/usb/xhci.c,v retrieving revision 1.40 diff -u -p -r1.40 xhci.c --- xhci.c 11 Nov 2014 12:10:44 -0000 1.40 +++ xhci.c 14 Nov 2014 12:13:39 -0000 @@ -720,6 +720,11 @@ xhci_event_xfer(struct xhci_softc *sc, u /* FALLTHROUGH */ case XHCI_CODE_BABBLE: +#if 1 + DPRINTF(("%s: dev %d dci=%d paddr=0x%016llx idx=%d remain=%u" + " code=%u\n", DEVNAME(sc), slot, dci, (long long)paddr, + trb_idx, remain, code)); +#endif /* * Since the stack might try to start a new transfer as * soon as a pending one finishes, make sure the endpoint @@ -1566,7 +1571,7 @@ xhci_cmd_configure_ep(struct xhci_softc { struct xhci_trb trb; - DPRINTF(("%s: %s\n", DEVNAME(sc), __func__)); + DPRINTF(("%s: %s dev %u\n", DEVNAME(sc), __func__, slot)); trb.trb_paddr = htole64(addr); trb.trb_status = 0; @@ -1582,7 +1587,7 @@ xhci_cmd_stop_ep(struct xhci_softc *sc, { struct xhci_trb trb; - DPRINTF(("%s: %s\n", DEVNAME(sc), __func__)); + DPRINTF(("%s: %s dev %u dci %u\n", DEVNAME(sc), __func__, slot, dci)); trb.trb_paddr = 0; trb.trb_status = 0; @@ -1598,7 +1603,7 @@ xhci_cmd_reset_endpoint_async(struct xhc { struct xhci_trb trb; - DPRINTF(("%s: %s\n", DEVNAME(sc), __func__)); + DPRINTF(("%s: %s dev %u dci %u\n", DEVNAME(sc), __func__, slot, dci)); trb.trb_paddr = 0; trb.trb_status = 0; @@ -1615,7 +1620,7 @@ xhci_cmd_set_tr_deq_async(struct xhci_so { struct xhci_trb trb; - DPRINTF(("%s: %s\n", DEVNAME(sc), __func__)); + DPRINTF(("%s: %s dev %u dci %u\n", DEVNAME(sc), __func__, slot, dci)); trb.trb_paddr = htole64(addr); trb.trb_status = 0; @@ -1673,7 +1678,7 @@ xhci_cmd_evaluate_ctx(struct xhci_softc { struct xhci_trb trb; - DPRINTF(("%s: %s\n", DEVNAME(sc), __func__)); + DPRINTF(("%s: %s dev %u\n", DEVNAME(sc), __func__, slot)); trb.trb_paddr = htole64(addr); trb.trb_status = 0;