> Date: Sun, 21 Jan 2018 00:07:47 +0200 > From: Artturi Alm <[email protected]>
I don't understand this. The code works fine on my Cubox-i. I doubt the reset is instant. What would make more sense is to change the code such that it waits until the ETHEREN bit clears. > On Thu, Jan 11, 2018 at 01:24:25AM +0200, Artturi Alm wrote: > > >Synopsis: kernel hang > > >Category: arm > > >Environment: > > System : OpenBSD 6.2 > > Details : OpenBSD 6.2-current (GENERIC) #154: Sat Jan 6 03:41:38 > > MST 2018 > > > > [email protected]:/usr/src/sys/arch/armv7/compile/GENERIC > > > > Architecture: OpenBSD.armv7 > > Machine : armv7 > > >Description: > > IMX6DQRM.pdf(page 1092) has no mention of the reset bit being > > self-clearing == nothing but this: > > > > field: |descr: > > _______________________________________________________________________ > > 0 |Ethernet MAC Reset > > RESET | When this field is set, it clears the ETHEREN field. > > >How-To-Repeat: > > av7wandb# ifconfig fec0 down > > av7wandb# ifconfig > > lo0: flags=8049<UP,LOOPBACK,RUNNING,MULTICAST> mtu 32768 > > index 3 priority 0 llprio 3 > > groups: lo > > inet6 ::1 prefixlen 128 > > inet6 fe80::1%lo0 prefixlen 64 scopeid 0x3 > > inet 127.0.0.1 netmask 0xff000000 > > fec0: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500 > > lladdr 00:1f:7b:b4:04:49 > > index 1 priority 0 llprio 3 > > groups: egress > > <HUNG UP> > > >Fix: > > minimal diff below. > > -Artturi > > ping? now w/CCs i forgot. > -Artturi > > > > > diff --git a/sys/arch/armv7/imx/if_fec.c b/sys/arch/armv7/imx/if_fec.c > > index 899c1904144..96d6b54873a 100644 > > --- a/sys/arch/armv7/imx/if_fec.c > > +++ b/sys/arch/armv7/imx/if_fec.c > > @@ -339,7 +339,6 @@ fec_attach(struct device *parent, struct device *self, > > void *aux) > > > > /* reset the controller */ > > HSET4(sc, ENET_ECR, ENET_ECR_RESET); > > - while(HREAD4(sc, ENET_ECR) & ENET_ECR_RESET); > > > > HWRITE4(sc, ENET_EIMR, 0); > > HWRITE4(sc, ENET_EIR, 0xffffffff); > > @@ -604,7 +603,6 @@ fec_init(struct fec_softc *sc) > > > > /* reset the controller */ > > HSET4(sc, ENET_ECR, ENET_ECR_RESET); > > - while(HREAD4(sc, ENET_ECR) & ENET_ECR_RESET); > > > > /* set hw address */ > > HWRITE4(sc, ENET_PALR, > > @@ -703,7 +701,6 @@ fec_stop(struct fec_softc *sc) > > > > /* reset the controller */ > > HSET4(sc, ENET_ECR, ENET_ECR_RESET); > > - while(HREAD4(sc, ENET_ECR) & ENET_ECR_RESET); > > } > > > > void > > > > > > dmesg: > > OpenBSD 6.2-current (GENERIC) #154: Sat Jan 6 03:41:38 MST 2018 > > [email protected]:/usr/src/sys/arch/armv7/compile/GENERIC > > real mem = 2147483648 (2048MB) > > avail mem = 2097070080 (1999MB) > > mainbus0 at root: Wandboard i.MX6 Quad Board rev B1 > > cpu0 at mainbus0: ARM Cortex-A9 r2p10 (ARMv7) > > cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled > > cpu0: 32KB(32b/l,4way) I-cache, 32KB(32b/l,4way) wr-back D-cache > > cortex0 at mainbus0 > > amptimer0 at cortex0: tick rate 396000 KHz > > armliicc0 at cortex0: rtl 7 waymask: 0x0000000f > > simplebus0 at mainbus0: "soc" > > ampintc0 at simplebus0 nirq 160, ncpu 4 > > simplebus1 at simplebus0: "aips-bus" > > imxccm0 at simplebus1: imx6 rev 1.2 CPU freq: 792 MHz > > syscon0 at simplebus1: "anatop" > > syscon1 at simplebus1: "snvs" > > syscon2 at simplebus1: "iomuxc-gpr" > > imxiomuxc0 at simplebus1 > > simplebus2 at simplebus1: "spba-bus" > > imxuart0 at simplebus2: console > > imxgpio0 at simplebus1 > > imxgpio1 at simplebus1 > > imxgpio2 at simplebus1 > > imxgpio3 at simplebus1 > > imxgpio4 at simplebus1 > > imxgpio5 at simplebus1 > > imxgpio6 at simplebus1 > > imxdog0 at simplebus1 > > imxanatop0 at simplebus1 > > imxtemp0 at simplebus1 > > imxgpc0 at simplebus1 > > simplebus3 at simplebus0: "aips-bus" > > syscon3 at simplebus3: "ocotp" > > imxehci0 at simplebus3 > > usb0 at imxehci0: USB revision 2.0 > > uhub0 at usb0 configuration 1 interface 0 "i.MX6 EHCI root hub" rev > > 2.00/1.00 addr 1 > > imxehci1 at simplebus3 > > usb1 at imxehci1: USB revision 2.0 > > uhub1 at usb1 configuration 1 interface 0 "i.MX6 EHCI root hub" rev > > 2.00/1.00 addr 1 > > fec0 at simplebus3 > > fec0: address 00:1f:7b:b4:04:49 > > atphy0 at fec0 phy 1: AR8035 10/100/1000 PHY, rev. 4 > > imxesdhc0 at simplebus3 > > imxesdhc0: 198 MHz base clock > > sdmmc0 at imxesdhc0: 4-bit, mmc high-speed, dma > > imxesdhc1 at simplebus3 > > imxesdhc1: 198 MHz base clock > > sdmmc1 at imxesdhc1: 4-bit, mmc high-speed, dma > > imxesdhc2 at simplebus3 > > imxesdhc2: 198 MHz base clock > > sdmmc2 at imxesdhc2: 4-bit, mmc high-speed, dma > > imxiic0 at simplebus3 > > iic0 at imxiic0 > > imxiic1 at simplebus3 > > iic1 at imxiic1 > > "fsl,sgtl5000" at iic1 addr 0xa not configured > > imxuart1 at simplebus3 > > imxahci0 at simplebus0: AHCI 1.3 > > scsibus0 at imxahci0: 32 targets > > simplebus4 at mainbus0: "regulators" > > sdmmc1: can't enable card > > scsibus1 at sdmmc2: 2 targets, initiator 0 > > sd0 at scsibus1 targ 1 lun 0: <SD/MMC, USD, 0002> SCSI2 0/direct removable > > sd0: 7517MB, 512 bytes/sector, 15394816 sectors > > vscsi0 at root > > scsibus2 at vscsi0: 256 targets > > softraid0 at root > > scsibus3 at softraid0: 256 targets > > boot device: sd0 > > root on sd0a (56259af92715ef48.a) swap on sd0b dump on sd0b > > WARNING: CHECK AND RESET THE DATE! > > > > usbdevs: > > Controller /dev/usb0: > > addr 1: high speed, self powered, config 1, EHCI root hub(0x0000), > > i.MX6(0x0000), rev 1.00 > > port 1 powered > > Controller /dev/usb1: > > addr 1: high speed, self powered, config 1, EHCI root hub(0x0000), > > i.MX6(0x0000), rev 1.00 > > port 1 powered > > > > pcidump: > > > > acpidump: > >
