On Tue, Jun 01, 2021 at 10:34:00AM +1000, Jonathan Gray wrote: > > cpu0: 256KB 64b/line disabled L2 cache > > the cpuid 0x80000006 method of getting l2 cache information > doesn't work here > > > cpu0: smt 0, core 0, package 0 > > mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges > > cpu0: apic clock running at 38MHz > > cpu0: mwait min=64, max=64, C-substates=0.2.0.1.2.1.1.1, IBE > > > cpu0: Enhanced SpeedStep 63762 MHz: speeds: 2701, 2700, 2600, 2500, 2300, > > 2100, 1900, 1700, 1600, 1400, 1200, 1100, 900, 700, 600, 400 MHz > > the 8253/8254 timer on recent intel machines doesn't work as expected > > that is why '63762 MHz' is claimed before tsc is used > > same behaviour we saw on the earlier comet lake machines > https://marc.info/?l=openbsd-bugs&m=160913944524804&w=2
I'll be more than happy to test stuff. As I said earlier, the machine now works and is a lot better in almost all respects than its predecessor from 2017 (which is still in the house but may be on its way elsewhere soon). I suspect this one has a lot in common with what other people will be buying in the near future. All the best, Peter -- Peter N. M. Hansteen, member of the first RFC 1149 implementation team http://bsdly.blogspot.com/ http://www.bsdly.net/ http://www.nuug.no/ "Remember to set the evil bit on all malicious network traffic" delilah spamd[29949]: 85.152.224.147: disconnected after 42673 seconds.
