Hi Jonathan,

Thank you very much for your patch. I patched the files and it does work.
My touchpad works now!! Thank you, thank you.

Please find T14G6i-touchpad-fix.dmesg.boot attached.

If I may, do you know if the following error is ok (is polling ok)?

ihidev0 at iic0 addr 0x15 ihidev0: can't establish interrupt
  (polling), vendor 0x4f3 product 0x3195, ELAN0676

Also, do you guys know what can be done with the WiFi (7740) or WWAN (Quectel EM160R-GL) cards?

"Intel Core Ultra SRAM" rev 0x00 at pci0 dev 20 function 2 not configured
vendor "Intel", unknown product 0x7740 (class network subclass miscellaneous, re
v 0x00) at pci0 dev 20 function 3 not configured

pci6 at ppb5 bus 8
vendor "Quectel", unknown product 0x100d (class undefined unknown subclass 0x00,
  rev 0x00) at pci6 dev 0 function 0 not configured

I also see, not sure if this is a bug?

0:31:5: mem address conflict 0xfe010000/0x1000

My pcidump looks like this:

  0:0:0: Intel unknown
  0:2:0: Intel Graphics
  0:4:0: Intel Core Ultra DTT
  0:6:0: Intel unknown
  0:6:1: Intel Core Ultra PCIE
  0:7:0: Intel Core Ultra PCIE
  0:7:2: Intel Core Ultra PCIE
  0:10:0: Intel Core Ultra PMT
  0:11:0: Intel Core Ultra NPU
  0:13:0: Intel Core Ultra xHCI
  0:13:2: Intel Core Ultra TBT
  0:13:3: Intel Core Ultra TBT
  0:20:0: Intel unknown
  0:20:2: Intel unknown
  0:20:3: Intel unknown
  0:21:0: Intel unknown
  0:22:0: Intel unknown
  0:28:0: Intel unknown
  0:28:6: Intel unknown
  0:31:0: Intel unknown
  0:31:3: Intel unknown
  0:31:4: Intel unknown
  0:31:5: Intel unknown
  0:31:6: Intel I219-V
  5:0:0: Samsung PM9C1a
  8:0:0: Quectel unknown

Thank you so much,
Peter


On 8/19/25 05:53, Jonathan Gray wrote:
On Mon, Aug 18, 2025 at 10:36:21AM -0400, Peter Moss wrote:
I re-built the 7.7, both release and stable, tested it, it boots ok.

I even got the red mouse pointer, mouse buttons working.

Touchpad is not working for me.  Audio, function keys (brightness, volume
etc) are working.
For touchpad, the i2c devices need to be matched.

Here is a patch to add Arrow Lake U/H ids and attach i2c.

from:
Intel Core Ultra 200H and 200U Series Processors
Datasheet, Volume 1 of 2, Doc. No.: 842704, Rev.: 002

not documented but in your dmesg:
pcib0 at pci0 dev 31 function 0 vendor "Intel", unknown product 0x7703 rev 0x00
I wonder if ARL_U_ESPI should be 0x7703 not 0x7203

CNVi/Wifi id of 0x7740 intentionally skipped

Index: sys/dev/pci/pcidevs
===================================================================
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
diff -u -p -r1.2108 pcidevs
--- sys/dev/pci/pcidevs 18 Aug 2025 06:09:10 -0000      1.2108
+++ sys/dev/pci/pcidevs 19 Aug 2025 09:45:23 -0000
@@ -6336,7 +6336,57 @@ product INTEL 82440MX_PM 0x719b  82440MX
  product INTEL 82440BX         0x71a0  82440BX AGP
  product INTEL 82440BX_AGP     0x71a1  82440BX AGP
  product INTEL 82443GX         0x71a2  82443GX
+product INTEL ARL_H_ESPI       0x7202  Core Ultra eSPI
+product INTEL ARL_U_ESPI       0x7203  Core Ultra eSPI
  product INTEL 82372FB_IDE     0x7601  82372FB IDE
+product INTEL ARL_U_P2SB_SOC   0x7720  Core Ultra P2SB
+product INTEL ARL_U_PMC_SOC    0x7721  Core Ultra PMC
+product INTEL ARL_U_SMB                0x7722  Core Ultra SMBus
+product INTEL ARL_U_SPI                0x7723  Core Ultra SPI
+product INTEL ARL_U_TH         0x7724  Core Ultra TH
+product INTEL ARL_U_UART_0     0x7725  Core Ultra UART
+product INTEL ARL_U_UART_1     0x7726  Core Ultra UART
+product INTEL ARL_U_GSPI_0     0x7727  Core Ultra GSPI
+product INTEL ARL_U_HDA                0x7728  Core Ultra HD Audio
+product INTEL ARL_U_GSPI_1     0x7730  Core Ultra GSPI
+product INTEL ARL_U_PCIE_1     0x7738  Core Ultra PCIE
+product INTEL ARL_U_PCIE_2     0x7739  Core Ultra PCIE
+product INTEL ARL_U_PCIE_3     0x773a  Core Ultra PCIE
+product INTEL ARL_U_PCIE_4     0x773b  Core Ultra PCIE
+product INTEL ARL_U_PCIE_5     0x773c  Core Ultra PCIE
+product INTEL ARL_U_PCIE_6     0x773d  Core Ultra PCIE
+product INTEL ARL_U_PCIE_7     0x773e  Core Ultra PCIE
+product INTEL ARL_U_PCIE_8     0x773f  Core Ultra PCIE
+product INTEL ARL_U_ISH                0x7745  Core Ultra ISH
+product INTEL ARL_U_GSPI_2     0x7746  Core Ultra GSPI
+product INTEL ARL_U_THC_0_1    0x7748  Core Ultra THC
+product INTEL ARL_U_THC_0_2    0x7749  Core Ultra THC
+product INTEL ARL_U_THC_1_1    0x774a  Core Ultra THC
+product INTEL ARL_U_THC_1_2    0x774b  Core Ultra THC
+product INTEL ARL_U_GNA                0x774c  Core Ultra GNA
+product INTEL ARL_U_PCIE_9     0x774d  Core Ultra PCIE
+product INTEL ARL_U_I2C_4      0x7750  Core Ultra I2C
+product INTEL ARL_U_I2C_5      0x7751  Core Ultra I2C
+product INTEL ARL_U_UART_2     0x7752  Core Ultra UART
+product INTEL ARL_U_HECI_1     0x7758  Core Ultra HECI
+product INTEL ARL_U_HECI_2     0x7759  Core Ultra HECI
+product INTEL ARL_U_HECI_3     0x775a  Core Ultra HECI
+product INTEL ARL_U_AHCI       0x7763  Core Ultra AHCI
+product INTEL ARL_U_RAID       0x7767  Core Ultra RAID
+product INTEL ARL_U_HECI_4     0x7770  Core Ultra HECI
+product INTEL ARL_U_HECI_5     0x7771  Core Ultra HECI
+product INTEL ARL_U_IDER       0x7772  Core Ultra IDE-R
+product INTEL ARL_U_KT         0x7773  Core Ultra KT
+product INTEL ARL_U_HECI_6     0x7774  Core Ultra HECI
+product INTEL ARL_U_HECI_7     0x7775  Core Ultra HECI
+product INTEL ARL_U_I2C_0      0x7778  Core Ultra I2C
+product INTEL ARL_U_I2C_1      0x7779  Core Ultra I2C
+product INTEL ARL_U_I2C_2      0x777a  Core Ultra I2C
+product INTEL ARL_U_I2C_3      0x777b  Core Ultra I2C
+product INTEL ARL_U_I3C                0x777c  Core Ultra I3C
+product INTEL ARL_U_XHCI       0x777d  Core Ultra xHCI
+product INTEL ARL_U_XDCI       0x777e  Core Ultra xDCI
+product INTEL ARL_U_SRAM       0x777f  Core Ultra SRAM
  product INTEL 82740           0x7800  82740 AGP
  product INTEL Z790_ESPI               0x7a04  Z790 eSPI
  product INTEL H770_ESPI               0x7a05  H770 eSPI
@@ -6468,12 +6518,14 @@ product INTEL MTL_U4_HB         0x7d00  Core Ult
  product INTEL MTL_H_HB_2      0x7d01  Core Ultra Host
  product INTEL MTL_U_HB_2      0x7d02  Core Ultra Host
  product INTEL MTL_DTT         0x7d03  Core Ultra DTT
+product INTEL ARL_H_HB         0x7d06  Core Ultra Host
  product INTEL MTL_VMD         0x7d0b  Core Ultra VMD
  product INTEL MTL_PMT         0x7d0d  Core Ultra PMT
  product INTEL MTL_H_HB_1      0x7d14  Core Ultra Host
  product INTEL MTL_U_HB_1      0x7d16  Core Ultra Host
  product INTEL MTL_IPU         0x7d19  Core Ultra IPU
  product INTEL MTL_NPU         0x7d1d  Core Ultra NPU
+product INTEL ARL_U_HB         0x7d30  Core Ultra Host
  product INTEL MTL_U4_GT_1     0x7d40  Graphics
  product INTEL ARL_U_GT_1      0x7d41  Graphics
  product INTEL MTL_U_GT_1      0x7d45  Graphics
Index: sys/dev/pci/pcidevs.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/pcidevs.h,v
diff -u -p -r1.2101 pcidevs.h
--- sys/dev/pci/pcidevs.h       18 Aug 2025 06:09:40 -0000      1.2101
+++ sys/dev/pci/pcidevs.h       19 Aug 2025 09:45:25 -0000
@@ -6341,7 +6341,57 @@
  #define       PCI_PRODUCT_INTEL_82440BX       0x71a0          /* 82440BX AGP 
*/
  #define       PCI_PRODUCT_INTEL_82440BX_AGP   0x71a1          /* 82440BX AGP 
*/
  #define       PCI_PRODUCT_INTEL_82443GX       0x71a2          /* 82443GX */
+#define        PCI_PRODUCT_INTEL_ARL_H_ESPI    0x7202          /* Core Ultra 
eSPI */
+#define        PCI_PRODUCT_INTEL_ARL_U_ESPI    0x7203          /* Core Ultra 
eSPI */
  #define       PCI_PRODUCT_INTEL_82372FB_IDE   0x7601          /* 82372FB IDE 
*/
+#define        PCI_PRODUCT_INTEL_ARL_U_P2SB_SOC        0x7720          /* Core 
Ultra P2SB */
+#define        PCI_PRODUCT_INTEL_ARL_U_PMC_SOC 0x7721          /* Core Ultra 
PMC */
+#define        PCI_PRODUCT_INTEL_ARL_U_SMB     0x7722          /* Core Ultra 
SMBus */
+#define        PCI_PRODUCT_INTEL_ARL_U_SPI     0x7723          /* Core Ultra 
SPI */
+#define        PCI_PRODUCT_INTEL_ARL_U_TH      0x7724          /* Core Ultra 
TH */
+#define        PCI_PRODUCT_INTEL_ARL_U_UART_0  0x7725          /* Core Ultra 
UART */
+#define        PCI_PRODUCT_INTEL_ARL_U_UART_1  0x7726          /* Core Ultra 
UART */
+#define        PCI_PRODUCT_INTEL_ARL_U_GSPI_0  0x7727          /* Core Ultra 
GSPI */
+#define        PCI_PRODUCT_INTEL_ARL_U_HDA     0x7728          /* Core Ultra 
HD Audio */
+#define        PCI_PRODUCT_INTEL_ARL_U_GSPI_1  0x7730          /* Core Ultra 
GSPI */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_1  0x7738          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_2  0x7739          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_3  0x773a          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_4  0x773b          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_5  0x773c          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_6  0x773d          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_7  0x773e          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_8  0x773f          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_ISH     0x7745          /* Core Ultra 
ISH */
+#define        PCI_PRODUCT_INTEL_ARL_U_GSPI_2  0x7746          /* Core Ultra 
GSPI */
+#define        PCI_PRODUCT_INTEL_ARL_U_THC_0_1 0x7748          /* Core Ultra 
THC */
+#define        PCI_PRODUCT_INTEL_ARL_U_THC_0_2 0x7749          /* Core Ultra 
THC */
+#define        PCI_PRODUCT_INTEL_ARL_U_THC_1_1 0x774a          /* Core Ultra 
THC */
+#define        PCI_PRODUCT_INTEL_ARL_U_THC_1_2 0x774b          /* Core Ultra 
THC */
+#define        PCI_PRODUCT_INTEL_ARL_U_GNA     0x774c          /* Core Ultra 
GNA */
+#define        PCI_PRODUCT_INTEL_ARL_U_PCIE_9  0x774d          /* Core Ultra 
PCIE */
+#define        PCI_PRODUCT_INTEL_ARL_U_I2C_4   0x7750          /* Core Ultra 
I2C */
+#define        PCI_PRODUCT_INTEL_ARL_U_I2C_5   0x7751          /* Core Ultra 
I2C */
+#define        PCI_PRODUCT_INTEL_ARL_U_UART_2  0x7752          /* Core Ultra 
UART */
+#define        PCI_PRODUCT_INTEL_ARL_U_HECI_1  0x7758          /* Core Ultra 
HECI */
+#define        PCI_PRODUCT_INTEL_ARL_U_HECI_2  0x7759          /* Core Ultra 
HECI */
+#define        PCI_PRODUCT_INTEL_ARL_U_HECI_3  0x775a          /* Core Ultra 
HECI */
+#define        PCI_PRODUCT_INTEL_ARL_U_AHCI    0x7763          /* Core Ultra 
AHCI */
+#define        PCI_PRODUCT_INTEL_ARL_U_RAID    0x7767          /* Core Ultra 
RAID */
+#define        PCI_PRODUCT_INTEL_ARL_U_HECI_4  0x7770          /* Core Ultra 
HECI */
+#define        PCI_PRODUCT_INTEL_ARL_U_HECI_5  0x7771          /* Core Ultra 
HECI */
+#define        PCI_PRODUCT_INTEL_ARL_U_IDER    0x7772          /* Core Ultra 
IDE-R */
+#define        PCI_PRODUCT_INTEL_ARL_U_KT      0x7773          /* Core Ultra 
KT */
+#define        PCI_PRODUCT_INTEL_ARL_U_HECI_6  0x7774          /* Core Ultra 
HECI */
+#define        PCI_PRODUCT_INTEL_ARL_U_HECI_7  0x7775          /* Core Ultra 
HECI */
+#define        PCI_PRODUCT_INTEL_ARL_U_I2C_0   0x7778          /* Core Ultra 
I2C */
+#define        PCI_PRODUCT_INTEL_ARL_U_I2C_1   0x7779          /* Core Ultra 
I2C */
+#define        PCI_PRODUCT_INTEL_ARL_U_I2C_2   0x777a          /* Core Ultra 
I2C */
+#define        PCI_PRODUCT_INTEL_ARL_U_I2C_3   0x777b          /* Core Ultra 
I2C */
+#define        PCI_PRODUCT_INTEL_ARL_U_I3C     0x777c          /* Core Ultra 
I3C */
+#define        PCI_PRODUCT_INTEL_ARL_U_XHCI    0x777d          /* Core Ultra 
xHCI */
+#define        PCI_PRODUCT_INTEL_ARL_U_XDCI    0x777e          /* Core Ultra 
xDCI */
+#define        PCI_PRODUCT_INTEL_ARL_U_SRAM    0x777f          /* Core Ultra 
SRAM */
  #define       PCI_PRODUCT_INTEL_82740 0x7800          /* 82740 AGP */
  #define       PCI_PRODUCT_INTEL_Z790_ESPI     0x7a04          /* Z790 eSPI */
  #define       PCI_PRODUCT_INTEL_H770_ESPI     0x7a05          /* H770 eSPI */
@@ -6473,12 +6523,14 @@
  #define       PCI_PRODUCT_INTEL_MTL_H_HB_2    0x7d01          /* Core Ultra 
Host */
  #define       PCI_PRODUCT_INTEL_MTL_U_HB_2    0x7d02          /* Core Ultra 
Host */
  #define       PCI_PRODUCT_INTEL_MTL_DTT       0x7d03          /* Core Ultra 
DTT */
+#define        PCI_PRODUCT_INTEL_ARL_H_HB      0x7d06          /* Core Ultra 
Host */
  #define       PCI_PRODUCT_INTEL_MTL_VMD       0x7d0b          /* Core Ultra 
VMD */
  #define       PCI_PRODUCT_INTEL_MTL_PMT       0x7d0d          /* Core Ultra 
PMT */
  #define       PCI_PRODUCT_INTEL_MTL_H_HB_1    0x7d14          /* Core Ultra 
Host */
  #define       PCI_PRODUCT_INTEL_MTL_U_HB_1    0x7d16          /* Core Ultra 
Host */
  #define       PCI_PRODUCT_INTEL_MTL_IPU       0x7d19          /* Core Ultra 
IPU */
  #define       PCI_PRODUCT_INTEL_MTL_NPU       0x7d1d          /* Core Ultra 
NPU */
+#define        PCI_PRODUCT_INTEL_ARL_U_HB      0x7d30          /* Core Ultra 
Host */
  #define       PCI_PRODUCT_INTEL_MTL_U4_GT_1   0x7d40          /* Graphics */
  #define       PCI_PRODUCT_INTEL_ARL_U_GT_1    0x7d41          /* Graphics */
  #define       PCI_PRODUCT_INTEL_MTL_U_GT_1    0x7d45          /* Graphics */
Index: sys/dev/pci/pcidevs_data.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/pcidevs_data.h,v
diff -u -p -r1.2096 pcidevs_data.h
--- sys/dev/pci/pcidevs_data.h  18 Aug 2025 06:09:40 -0000      1.2096
+++ sys/dev/pci/pcidevs_data.h  19 Aug 2025 09:45:25 -0000
@@ -22688,10 +22688,210 @@ static const struct pci_known_product pc
            "82443GX",
        },
        {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_H_ESPI,
+           "Core Ultra eSPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_ESPI,
+           "Core Ultra eSPI",
+       },
+       {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82372FB_IDE,
            "82372FB IDE",
        },
        {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_P2SB_SOC,
+           "Core Ultra P2SB",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PMC_SOC,
+           "Core Ultra PMC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_SMB,
+           "Core Ultra SMBus",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_SPI,
+           "Core Ultra SPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_TH,
+           "Core Ultra TH",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_UART_0,
+           "Core Ultra UART",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_UART_1,
+           "Core Ultra UART",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_GSPI_0,
+           "Core Ultra GSPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HDA,
+           "Core Ultra HD Audio",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_GSPI_1,
+           "Core Ultra GSPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_1,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_2,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_3,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_4,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_5,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_6,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_7,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_8,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_ISH,
+           "Core Ultra ISH",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_GSPI_2,
+           "Core Ultra GSPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_THC_0_1,
+           "Core Ultra THC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_THC_0_2,
+           "Core Ultra THC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_THC_1_1,
+           "Core Ultra THC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_THC_1_2,
+           "Core Ultra THC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_GNA,
+           "Core Ultra GNA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_PCIE_9,
+           "Core Ultra PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_4,
+           "Core Ultra I2C",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_5,
+           "Core Ultra I2C",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_UART_2,
+           "Core Ultra UART",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HECI_1,
+           "Core Ultra HECI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HECI_2,
+           "Core Ultra HECI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HECI_3,
+           "Core Ultra HECI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_AHCI,
+           "Core Ultra AHCI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_RAID,
+           "Core Ultra RAID",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HECI_4,
+           "Core Ultra HECI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HECI_5,
+           "Core Ultra HECI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_IDER,
+           "Core Ultra IDE-R",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_KT,
+           "Core Ultra KT",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HECI_6,
+           "Core Ultra HECI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HECI_7,
+           "Core Ultra HECI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_0,
+           "Core Ultra I2C",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_1,
+           "Core Ultra I2C",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_2,
+           "Core Ultra I2C",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_3,
+           "Core Ultra I2C",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I3C,
+           "Core Ultra I3C",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_XHCI,
+           "Core Ultra xHCI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_XDCI,
+           "Core Ultra xDCI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_SRAM,
+           "Core Ultra SRAM",
+       },
+       {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82740,
            "82740 AGP",
        },
@@ -23216,6 +23416,10 @@ static const struct pci_known_product pc
            "Core Ultra DTT",
        },
        {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_H_HB,
+           "Core Ultra Host",
+       },
+       {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_VMD,
            "Core Ultra VMD",
        },
@@ -23238,6 +23442,10 @@ static const struct pci_known_product pc
        {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_NPU,
            "Core Ultra NPU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_HB,
+           "Core Ultra Host",
        },
        {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_GT_1,
Index: sys/dev/pci/dwiic_pci.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/dwiic_pci.c,v
diff -u -p -r1.31 dwiic_pci.c
--- sys/dev/pci/dwiic_pci.c     6 Sep 2024 03:52:38 -0000       1.31
+++ sys/dev/pci/dwiic_pci.c     19 Aug 2025 09:22:09 -0000
@@ -185,6 +185,12 @@ const struct pci_matchid dwiic_pci_ids[]
        { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_LNL_I2C_3 },
        { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_LNL_I2C_4 },
        { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_LNL_I2C_5 },
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_0 },
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_1 },
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_2 },
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_3 },
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_4 },
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_I2C_5 },
  };
int
Index: sys/dev/pci/ichiic.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/ichiic.c,v
diff -u -p -r1.57 ichiic.c
--- sys/dev/pci/ichiic.c        20 Jul 2025 23:13:21 -0000      1.57
+++ sys/dev/pci/ichiic.c        19 Aug 2025 09:22:31 -0000
@@ -143,6 +143,7 @@ const struct pci_matchid ichiic_ids[] =
        { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_SMB },
        { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_SMB },
        { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_LNL_SMB },
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARL_U_SMB },
  };
int
OpenBSD 7.7 (GENERIC.MP) #17: Tue Aug 19 23:19:38 EDT 2025
    je...@t14g6i.lan:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 102515351552 (97766MB)
avail mem = 99381248000 (94777MB)
random: good seed from bootblocks
mpath0 at root
scsibus0 at mpath0: 256 targets
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 3.8 @ 0x82e2b000 (78 entries)
bios0: vendor LENOVO version "N4JET19W (1.09 )" date 07/15/2025
bios0: LENOVO 21QCCTO1WW
efi0 at bios0: UEFI 2.7
efi0: Lenovo rev 0x1090
acpi0 at bios0: ACPI 6.3
acpi0: sleep states S0ix S4 S5
acpi0: tables DSDT FACP SSDT SSDT SSDT SSDT SSDT SSDT SSDT SSDT SSDT SSDT SSDT 
SSDT DTPR SSDT SSDT TPM2 SSDT SSDT ECDT HPET APIC MCFG SSDT SSDT SSDT SSDT LPIT 
WSMT SSDT DBGP DBG2 NHLT MSDM SSDT BATB DMAR FPDT SSDT SSDT SSDT SDEV PHAT BGRT 
UEFI
acpi0: wakeup devices AWAC(S4) XDCI(S4) GLAN(S4) XHCI(S3) HDAS(S4) I3C0(S4) 
CNVW(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) PXSX(S4) RP04(S4) PXSX(S4) 
RP05(S4) PXSX(S4) [...]
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpiec0 at acpi0
acpihpet0 at acpi0: 19200000 Hz
acpimadt0 at acpi0 addr 0xfee00000: PC-AT compat
cpu0 at mainbus0: apid 16 (boot processor)
cpu0: Intel(R) Core(TM) Ultra 5 225U, 4790.14 MHz, 06-b5-00, patch 0000000a
cpu0: cpuid 1 
edx=bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
 
ecx=77fafbff<SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND>
cpu0: cpuid 6 eax=df8ff7<SENSOR,ARAT> ecx=409<EFFFREQ>
cpu0: cpuid 7.0 
ebx=239c27eb<FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,RDSEED,ADX,SMAP,CLFLUSHOPT,CLWB,PT,SHA>
 ecx=994007ac<UMIP,PKU,WAITPKG,PKS> 
edx=fc18c410<MD_CLEAR,IBT,IBRS,IBPB,STIBP,L1DF,SSBD>
cpu0: cpuid a vers=5, gp=8, gpwidth=48, ff=3, ffwidth=48
cpu0: cpuid d.1 eax=f<XSAVEOPT,XSAVEC,XGETBV1,XSAVES>
cpu0: cpuid 80000001 edx=2c100800<NXE,PAGE1GB,RDTSCP,LONG> 
ecx=121<LAHF,ABM,3DNOWP>
cpu0: cpuid 80000007 edx=100<ITSC>
cpu0: msr 
10a=de9fd6b<IBRS_ALL,SKIP_L1DFL,MDS_NO,IF_PSCHANGE,TAA_NO,MISC_PKG_CT,ENERGY_FILT,DOITM,SBDR_SSDP_N,FBSDP_NO,PSDP_NO,RRSBA,XAPIC_DIS,OVERCLOCK,PBRSB_NO,GDS_NO,RFDS_NO>
cpu0: 48KB 64b/line 12-way D-cache, 64KB 64b/line 16-way I-cache, 2MB 64b/line 
16-way L2 cache, 12MB 64b/line 12-way L3 cache
cpu0: smt 0, core 8, package 0
mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges
cpu0: apic clock running at 38MHz
cpu0: mwait min=64, max=64, C-substates=0.2.0.2.1.1.1.1, IBE
cpu1 at mainbus0: apid 17 (application processor)
cpu1: Intel(R) Core(TM) Ultra 5 225U, 4790.43 MHz, 06-b5-00, patch 0000000a
cpu1: smt 1, core 8, package 0
cpu2 at mainbus0: apid 24 (application processor)
cpu2: Intel(R) Core(TM) Ultra 5 225U, 4690.61 MHz, 06-b5-00, patch 0000000a
cpu2: smt 0, core 12, package 0
cpu3 at mainbus0: apid 25 (application processor)
cpu3: Intel(R) Core(TM) Ultra 5 225U, 4690.46 MHz, 06-b5-00, patch 0000000a
cpu3: smt 1, core 12, package 0
cpu4 at mainbus0: apid 0 (application processor)
cpu4: Intel(R) Core(TM) Ultra 5 225U, 1297.21 MHz, 06-b5-00, patch 0000000a
cpu4: 32KB 64b/line 8-way D-cache, 64KB 64b/line 8-way I-cache, 2MB 64b/line 
16-way L2 cache, 12MB 64b/line 12-way L3 cache
cpu4: smt 0, core 0, package 0
cpu5 at mainbus0: apid 2 (application processor)
cpu5: Intel(R) Core(TM) Ultra 5 225U, 1297.19 MHz, 06-b5-00, patch 0000000a
cpu5: smt 0, core 1, package 0
cpu6 at mainbus0: apid 4 (application processor)
cpu6: Intel(R) Core(TM) Ultra 5 225U, 1296.31 MHz, 06-b5-00, patch 0000000a
cpu6: smt 0, core 2, package 0
cpu7 at mainbus0: apid 6 (application processor)
cpu7: Intel(R) Core(TM) Ultra 5 225U, 1293.71 MHz, 06-b5-00, patch 0000000a
cpu7: smt 0, core 3, package 0
cpu8 at mainbus0: apid 8 (application processor)
cpu8: Intel(R) Core(TM) Ultra 5 225U, 1285.65 MHz, 06-b5-00, patch 0000000a
cpu8: smt 0, core 4, package 0
cpu9 at mainbus0: apid 10 (application processor)
cpu9: Intel(R) Core(TM) Ultra 5 225U, 1297.19 MHz, 06-b5-00, patch 0000000a
cpu9: smt 0, core 5, package 0
cpu10 at mainbus0: apid 12 (application processor)
cpu10: Intel(R) Core(TM) Ultra 5 225U, 1297.19 MHz, 06-b5-00, patch 0000000a
cpu10: smt 0, core 6, package 0
cpu11 at mainbus0: apid 14 (application processor)
cpu11: Intel(R) Core(TM) Ultra 5 225U, 1297.16 MHz, 06-b5-00, patch 0000000a
cpu11: smt 0, core 7, package 0
cpu12 at mainbus0: apid 64 (application processor)
cpu12: Intel(R) Core(TM) Ultra 5 225U, 1031.17 MHz, 06-b5-00, patch 0000000a
cpu12: 32KB 64b/line 8-way D-cache, 64KB 64b/line 8-way I-cache, 2MB 64b/line 
16-way L2 cache
cpu12: smt 0, core 32, package 0
cpu13 at mainbus0: apid 66 (application processor)
cpu13: Intel(R) Core(TM) Ultra 5 225U, 832.78 MHz, 06-b5-00, patch 0000000a
cpu13: smt 0, core 33, package 0
ioapic0 at mainbus0: apid 2 pa 0xfec00000, version 20, 120 pins
acpimcfg0 at acpi0
acpimcfg0: addr 0xc0000000, bus 0-255

aml_store() T14-debugging start -------
aml_store() copying non-package (type: 1) into package
aml_store() rhs.type: 1
aml_store() rhs.length: 8
aml_store() rhs.refcnt: 2
aml_store() rhs.stack: 97
aml_store() rhs.node: 0x0
aml_store() rhs.node name: 
scope: 0xffff800000419c08
scope->node: 0xffff8000001c2608
aml_store() scope->node name: \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG
===== Begin Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====
 Arg0:  [\\_SB_.PC00.HDAS.IDA_.SNDW.LNK0] 0xffff8000001c3088 cnt:02 stk:00 
package: 02
 0xffff8000001c4c88 cnt:01 stk:00 buffer: 10 {14, d8, ff, da, ba, 6e, 8c, 4d, 
8a, 91, bc, 9b, bf, 4a, a3, 01}
 0xffff8000001c4888 cnt:01 stk:00 package: 0e
 0xffff8000001c5708 cnt:01 stk:00 package: 02
 0xffff8000001c6108 cnt:01 stk:00 string: intel-quirk-mask
 0xffff8000001c6188 cnt:01 stk:00 integer: 2
 0xffff8000001c5788 cnt:01 stk:00 package: 02
 0xffff8000001c6208 cnt:01 stk:00 string: intel-sdw-ip-clock
 0xffff8000001c6288 cnt:01 stk:00 integer: 0
 0xffff8000001c4088 cnt:01 stk:00 package: 02
 0xffff8000001c6308 cnt:01 stk:00 string: intel-sdw-doais
 0xffff8000001c6388 cnt:01 stk:00 integer: 1
 0xffff8000001c5d08 cnt:01 stk:00 package: 02
 0xffff8000001c6408 cnt:01 stk:00 string: intel-sdw-dods
 0xffff8000001c6488 cnt:01 stk:00 integer: 1
 0xffff8000001c4e88 cnt:01 stk:00 package: 02
 0xffff8000001c6508 cnt:01 stk:00 string: intel-autonomous-clock-stop
 0xffff8000001c6588 cnt:01 stk:00 integer: 0
 0xffff8000001c4f08 cnt:01 stk:00 package: 02
 0xffff8000001c6608 cnt:01 stk:00 string: intel-sdw-lane-mask
 0xffff8000001c6688 cnt:01 stk:00 integer: 0
 0xffff8000001c3f08 cnt:01 stk:00 package: 02
 0xffff8000001c6708 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode0-supported
 0xffff8000001c6788 cnt:01 stk:00 integer: 1
 0xffff8000001c3f88 cnt:01 stk:00 package: 02
 0xffff8000001c6808 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode1-supported
 0xffff8000001c6888 cnt:01 stk:00 integer: 1
 0xffff8000001c3688 cnt:01 stk:00 package: 02
 0xffff8000001c6908 cnt:01 stk:00 string: mipi-sdw-clock-frequencies-supported
 0xffff8000001c6988 cnt:02 stk:00 package: 02
 0xffff8000001c6a08 cnt:01 stk:00 integer: 493e00
 0xffff8000001c6a88 cnt:01 stk:00 integer: 927c00
 0xffff8000001c3b08 cnt:01 stk:00 package: 02
 0xffff8000001c6b08 cnt:01 stk:00 string: mipi-sdw-default-frame-rate
 0xffff8000001c6b88 cnt:01 stk:00 integer: bb80
 0xffff8000001c3e08 cnt:01 stk:00 package: 02
 0xffff8000001c6c08 cnt:01 stk:00 string: mipi-sdw-default-frame-row-size
 0xffff8000001c6c88 cnt:01 stk:00 integer: 32
 0xffff8000001c3908 cnt:01 stk:00 package: 02
 0xffff8000001c6d08 cnt:01 stk:00 string: mipi-sdw-default-frame-col-size
 0xffff8000001c6d88 cnt:01 stk:00 integer: 4
 0xffff8000001c6008 cnt:01 stk:00 package: 02
 0xffff8000001c6e08 cnt:01 stk:00 string: mipi-sdw-dynamic-frame-shape
 0xffff8000001c6e88 cnt:01 stk:00 integer: 1
 0xffff8000001c6088 cnt:01 stk:00 package: 02
 0xffff8000001c6f08 cnt:01 stk:00 string: mipi-sdw-command-error-threshold
 0xffff8000001c6f88 cnt:01 stk:00 integer: 10
 Arg1:  0xffff800000409d08 cnt:01 stk:00 integer: 6593659b
 Local0:  0xffff80000040e388 cnt:01 stk:60 integer: 0
 Local1:  0xffff800000403588 cnt:02 stk:61 integer: 0
 Local2:  0xffff80000040f188 cnt:01 stk:62 integer: 0
 Local3:  0xffff800000407808 cnt:01 stk:63 integer: 0

===== End Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====

aml_store() T14-debugging end -------

aml_store() T14-debugging start -------
aml_store() copying non-package (type: 1) into package
aml_store() rhs.type: 1
aml_store() rhs.length: 8
aml_store() rhs.refcnt: 2
aml_store() rhs.stack: 97
aml_store() rhs.node: 0x0
aml_store() rhs.node name: 
scope: 0xffff800000404e08
scope->node: 0xffff8000001c2608
aml_store() scope->node name: \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG
===== Begin Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====
 Arg0:  [\\_SB_.PC00.HDAS.IDA_.SNDW.LNK1] 0xffff8000001c5008 cnt:02 stk:00 
package: 02
 0xffff8000001c7b08 cnt:01 stk:00 buffer: 10 {14, d8, ff, da, ba, 6e, 8c, 4d, 
8a, 91, bc, 9b, bf, 4a, a3, 01}
 0xffff8000001c7b88 cnt:01 stk:00 package: 0e
 0xffff8000001c7988 cnt:01 stk:00 package: 02
 0xffff8000001c7788 cnt:01 stk:00 string: intel-quirk-mask
 0xffff8000001c7508 cnt:01 stk:00 integer: 2
 0xffff8000001c5308 cnt:01 stk:00 package: 02
 0xffff8000001c7588 cnt:01 stk:00 string: intel-sdw-ip-clock
 0xffff8000001c5f08 cnt:01 stk:00 integer: 0
 0xffff8000001c7e88 cnt:01 stk:00 package: 02
 0xffff8000001c7688 cnt:01 stk:00 string: intel-sdw-doais
 0xffff8000001c4308 cnt:01 stk:00 integer: 1
 0xffff8000001c7f08 cnt:01 stk:00 package: 02
 0xffff8000001c5d88 cnt:01 stk:00 string: intel-sdw-dods
 0xffff8000001c5c88 cnt:01 stk:00 integer: 1
 0xffff8000001c7f88 cnt:01 stk:00 package: 02
 0xffff8000001c5a08 cnt:01 stk:00 string: intel-autonomous-clock-stop
 0xffff8000001c5208 cnt:01 stk:00 integer: 0
 0xffff8000001c7d08 cnt:01 stk:00 package: 02
 0xffff8000001c5808 cnt:01 stk:00 string: intel-sdw-lane-mask
 0xffff8000001c5088 cnt:01 stk:00 integer: 0
 0xffff8000001c7d88 cnt:01 stk:00 package: 02
 0xffff8000001c3708 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode0-supported
 0xffff8000001c8008 cnt:01 stk:00 integer: 1
 0xffff8000001c5188 cnt:01 stk:00 package: 02
 0xffff8000001c8088 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode1-supported
 0xffff8000001c8108 cnt:01 stk:00 integer: 1
 0xffff8000001c7188 cnt:01 stk:00 package: 02
 0xffff8000001c8188 cnt:01 stk:00 string: mipi-sdw-clock-frequencies-supported
 0xffff8000001c8208 cnt:02 stk:00 package: 02
 0xffff8000001c8288 cnt:01 stk:00 integer: 493e00
 0xffff8000001c8308 cnt:01 stk:00 integer: 927c00
 0xffff8000001c5e88 cnt:01 stk:00 package: 02
 0xffff8000001c8388 cnt:01 stk:00 string: mipi-sdw-default-frame-rate
 0xffff8000001c8408 cnt:01 stk:00 integer: bb80
 0xffff8000001c7008 cnt:01 stk:00 package: 02
 0xffff8000001c8488 cnt:01 stk:00 string: mipi-sdw-default-frame-row-size
 0xffff8000001c8508 cnt:01 stk:00 integer: 32
 0xffff8000001c7308 cnt:01 stk:00 package: 02
 0xffff8000001c8588 cnt:01 stk:00 string: mipi-sdw-default-frame-col-size
 0xffff8000001c8608 cnt:01 stk:00 integer: 4
 0xffff8000001c7388 cnt:01 stk:00 package: 02
 0xffff8000001c8688 cnt:01 stk:00 string: mipi-sdw-dynamic-frame-shape
 0xffff8000001c8708 cnt:01 stk:00 integer: 1
 0xffff8000001c3208 cnt:01 stk:00 package: 02
 0xffff8000001c8788 cnt:01 stk:00 string: mipi-sdw-command-error-threshold
 0xffff8000001c8808 cnt:01 stk:00 integer: 10
 Arg1:  0xffff8000003e9d08 cnt:01 stk:00 integer: 6593659b
 Local0:  0xffff80000040fd88 cnt:01 stk:60 integer: 0
 Local1:  0xffff8000003e8788 cnt:02 stk:61 integer: 0
 Local2:  0xffff8000003ebd08 cnt:01 stk:62 integer: 0
 Local3:  0xffff800000412288 cnt:01 stk:63 integer: 0

===== End Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====

aml_store() T14-debugging end -------

aml_store() T14-debugging start -------
aml_store() copying non-package (type: 1) into package
aml_store() rhs.type: 1
aml_store() rhs.length: 8
aml_store() rhs.refcnt: 2
aml_store() rhs.stack: 97
aml_store() rhs.node: 0x0
aml_store() rhs.node name: 
scope: 0xffff800000403d08
scope->node: 0xffff8000001c2608
aml_store() scope->node name: \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG
===== Begin Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====
 Arg0:  [\\_SB_.PC00.HDAS.IDA_.SNDW.LNK2] 0xffff8000001c8908 cnt:02 stk:00 
package: 02
 0xffff8000001c8b08 cnt:01 stk:00 buffer: 10 {14, d8, ff, da, ba, 6e, 8c, 4d, 
8a, 91, bc, 9b, bf, 4a, a3, 01}
 0xffff8000001c4688 cnt:01 stk:00 package: 0e
 0xffff8000001c5f88 cnt:01 stk:00 package: 02
 0xffff8000001c9208 cnt:01 stk:00 string: intel-quirk-mask
 0xffff8000001c9288 cnt:01 stk:00 integer: 2
 0xffff8000001c5a88 cnt:01 stk:00 package: 02
 0xffff8000001c9308 cnt:01 stk:00 string: intel-sdw-ip-clock
 0xffff8000001c9388 cnt:01 stk:00 integer: 0
 0xffff8000001c5108 cnt:01 stk:00 package: 02
 0xffff8000001c9408 cnt:01 stk:00 string: intel-sdw-doais
 0xffff8000001c9488 cnt:01 stk:00 integer: 1
 0xffff8000001c3288 cnt:01 stk:00 package: 02
 0xffff8000001c9508 cnt:01 stk:00 string: intel-sdw-dods
 0xffff8000001c9588 cnt:01 stk:00 integer: 1
 0xffff8000001c8e08 cnt:01 stk:00 package: 02
 0xffff8000001c9608 cnt:01 stk:00 string: intel-autonomous-clock-stop
 0xffff8000001c9688 cnt:01 stk:00 integer: 0
 0xffff8000001c8e88 cnt:01 stk:00 package: 02
 0xffff8000001c9708 cnt:01 stk:00 string: intel-sdw-lane-mask
 0xffff8000001c9788 cnt:01 stk:00 integer: 0
 0xffff8000001c8b88 cnt:01 stk:00 package: 02
 0xffff8000001c9808 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode0-supported
 0xffff8000001c9888 cnt:01 stk:00 integer: 1
 0xffff8000001c8c08 cnt:01 stk:00 package: 02
 0xffff8000001c9908 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode1-supported
 0xffff8000001c9988 cnt:01 stk:00 integer: 1
 0xffff8000001c8988 cnt:01 stk:00 package: 02
 0xffff8000001c9a08 cnt:01 stk:00 string: mipi-sdw-clock-frequencies-supported
 0xffff8000001c9a88 cnt:02 stk:00 package: 02
 0xffff8000001c9b08 cnt:01 stk:00 integer: 493e00
 0xffff8000001c9b88 cnt:01 stk:00 integer: 927c00
 0xffff8000001c8a08 cnt:01 stk:00 package: 02
 0xffff8000001c9c08 cnt:01 stk:00 string: mipi-sdw-default-frame-rate
 0xffff8000001c9c88 cnt:01 stk:00 integer: bb80
 0xffff8000001c9008 cnt:01 stk:00 package: 02
 0xffff8000001c9d08 cnt:01 stk:00 string: mipi-sdw-default-frame-row-size
 0xffff8000001c9d88 cnt:01 stk:00 integer: 32
 0xffff8000001c9088 cnt:01 stk:00 package: 02
 0xffff8000001c9e08 cnt:01 stk:00 string: mipi-sdw-default-frame-col-size
 0xffff8000001c9e88 cnt:01 stk:00 integer: 4
 0xffff8000001c9108 cnt:01 stk:00 package: 02
 0xffff8000001c9f08 cnt:01 stk:00 string: mipi-sdw-dynamic-frame-shape
 0xffff8000001c9f88 cnt:01 stk:00 integer: 1
 0xffff8000001c9188 cnt:01 stk:00 package: 02
 0xffff8000001cb008 cnt:01 stk:00 string: mipi-sdw-command-error-threshold
 0xffff8000001cb088 cnt:01 stk:00 integer: 10
 Arg1:  0xffff800000417988 cnt:01 stk:00 integer: 6593659b
 Local0:  0xffff800000402908 cnt:01 stk:60 integer: 0
 Local1:  0xffff800000418188 cnt:02 stk:61 integer: 0
 Local2:  0xffff80000040fe88 cnt:01 stk:62 integer: 0
 Local3:  0xffff80000040aa88 cnt:01 stk:63 integer: 0

===== End Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====

aml_store() T14-debugging end -------

aml_store() T14-debugging start -------
aml_store() copying non-package (type: 1) into package
aml_store() rhs.type: 1
aml_store() rhs.length: 8
aml_store() rhs.refcnt: 2
aml_store() rhs.stack: 97
aml_store() rhs.node: 0x0
aml_store() rhs.node name: 
scope: 0xffff800000405788
scope->node: 0xffff8000001c2608
aml_store() scope->node name: \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG
===== Begin Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====
 Arg0:  [\\_SB_.PC00.HDAS.IDA_.SNDW.LNK3] 0xffff8000001cb188 cnt:02 stk:00 
package: 02
 0xffff8000001c3988 cnt:01 stk:00 buffer: 10 {14, d8, ff, da, ba, 6e, 8c, 4d, 
8a, 91, bc, 9b, bf, 4a, a3, 01}
 0xffff8000001c3c88 cnt:01 stk:00 package: 0e
 0xffff8000001cbc08 cnt:01 stk:00 package: 02
 0xffff8000001cb508 cnt:01 stk:00 string: intel-quirk-mask
 0xffff8000001c8f88 cnt:01 stk:00 integer: 2
 0xffff8000001c5908 cnt:01 stk:00 package: 02
 0xffff8000001c5388 cnt:01 stk:00 string: intel-sdw-ip-clock
 0xffff8000001cbf08 cnt:01 stk:00 integer: 0
 0xffff8000001cba08 cnt:01 stk:00 package: 02
 0xffff8000001cbf88 cnt:01 stk:00 string: intel-sdw-doais
 0xffff8000001cb688 cnt:01 stk:00 integer: 1
 0xffff8000001c7c08 cnt:01 stk:00 package: 02
 0xffff8000001cb708 cnt:01 stk:00 string: intel-sdw-dods
 0xffff8000001cb408 cnt:01 stk:00 integer: 1
 0xffff8000001cb888 cnt:01 stk:00 package: 02
 0xffff8000001cb488 cnt:01 stk:00 string: intel-autonomous-clock-stop
 0xffff8000001cb208 cnt:01 stk:00 integer: 0
 0xffff8000001cbe08 cnt:01 stk:00 package: 02
 0xffff8000001cb288 cnt:01 stk:00 string: intel-sdw-lane-mask
 0xffff8000001cd008 cnt:01 stk:00 integer: 0
 0xffff8000001c5988 cnt:01 stk:00 package: 02
 0xffff8000001cd088 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode0-supported
 0xffff8000001cd108 cnt:01 stk:00 integer: 1
 0xffff8000001c7a88 cnt:01 stk:00 package: 02
 0xffff8000001cd188 cnt:01 stk:00 string: mipi-sdw-clock-stop-mode1-supported
 0xffff8000001cd208 cnt:01 stk:00 integer: 1
 0xffff8000001c4288 cnt:01 stk:00 package: 02
 0xffff8000001cd288 cnt:01 stk:00 string: mipi-sdw-clock-frequencies-supported
 0xffff8000001cd308 cnt:02 stk:00 package: 02
 0xffff8000001cd388 cnt:01 stk:00 integer: 493e00
 0xffff8000001cd408 cnt:01 stk:00 integer: 927c00
 0xffff8000001c7488 cnt:01 stk:00 package: 02
 0xffff8000001cd488 cnt:01 stk:00 string: mipi-sdw-default-frame-rate
 0xffff8000001cd508 cnt:01 stk:00 integer: bb80
 0xffff8000001c5608 cnt:01 stk:00 package: 02
 0xffff8000001cd588 cnt:01 stk:00 string: mipi-sdw-default-frame-row-size
 0xffff8000001cd608 cnt:01 stk:00 integer: 32
 0xffff8000001cbe88 cnt:01 stk:00 package: 02
 0xffff8000001cd688 cnt:01 stk:00 string: mipi-sdw-default-frame-col-size
 0xffff8000001cd708 cnt:01 stk:00 integer: 4
 0xffff8000001cba88 cnt:01 stk:00 package: 02
 0xffff8000001cd788 cnt:01 stk:00 string: mipi-sdw-dynamic-frame-shape
 0xffff8000001cd808 cnt:01 stk:00 integer: 1
 0xffff8000001cbd08 cnt:01 stk:00 package: 02
 0xffff8000001cd888 cnt:01 stk:00 string: mipi-sdw-command-error-threshold
 0xffff8000001cd908 cnt:01 stk:00 integer: 10
 Arg1:  0xffff8000003ec808 cnt:01 stk:00 integer: 6593659b
 Local0:  0xffff8000003e5108 cnt:01 stk:60 integer: 0
 Local1:  0xffff8000003de988 cnt:02 stk:61 integer: 0
 Local2:  0xffff80000040ff88 cnt:01 stk:62 integer: 0
 Local3:  0xffff800000415f08 cnt:01 stk:63 integer: 0

===== End Stack \\_SB_.PC00.HDAS.IDA_.SNDW.XCFG:Method =====

aml_store() T14-debugging end -------
acpiprt0 at acpi0: bus 0 (PC00)
acpiprt1 at acpi0: bus 29 (RP01)
acpiprt2 at acpi0: bus -1 (RP02)
acpiprt3 at acpi0: bus -1 (RP03)
acpiprt4 at acpi0: bus -1 (RP04)
acpiprt5 at acpi0: bus -1 (RP05)
acpiprt6 at acpi0: bus -1 (RP06)
acpiprt7 at acpi0: bus 8 (RP07)
acpiprt8 at acpi0: bus -1 (RP08)
acpiprt9 at acpi0: bus 28 (RP09)
acpiprt10 at acpi0: bus 5 (RP10)
acpiprt11 at acpi0: bus -1 (RP11)
acpiprt12 at acpi0: bus -1 (RP12)
acpiprt13 at acpi0: bus 32 (TRP0)
acpiprt14 at acpi0: bus 80 (TRP2)
acpipci0 at acpi0 PC00: 0x00000000 0x00000011 0x00000001
"ACPI000E" at acpi0 not configured
acpithinkpad0 at acpi0: version 2.0
acpiac0 at acpi0: AC unit online
acpibat0 at acpi0: BAT0 model "5B11M90125" serial  4815 type LiP oem "ATL"
"LEN0140" at acpi0 not configured
"LEN0111" at acpi0 not configured
"LEN0100" at acpi0 not configured
"LEN0130" at acpi0 not configured
"INTC1062" at acpi0 not configured
"INTC1062" at acpi0 not configured
"INTC1062" at acpi0 not configured
"INTC1062" at acpi0 not configured
"INTC1062" at acpi0 not configured
"INTC1062" at acpi0 not configured
"LEN0071" at acpi0 not configured
"LEN0329" at acpi0 not configured
"ELAN0676" at acpi0 not configured
"INTC105E" at acpi0 not configured
acpibtn0 at acpi0: SLPB(wakeup)
acpicpu0 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu1 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu2 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu3 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu4 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu5 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu6 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu7 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu8 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu9 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu10 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu11 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu12 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
acpicpu13 at acpi0: C3(200@1048 mwait.1@0x60), C2(200@253 mwait.1@0x30), 
C1(1000@1 mwait.1), PSS
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
intelpmc0 at acpi0: PEPD
state 0: 0x7f:1:2:0x00:0x0000000000000060
counter: 0x7f:64:0:0x00:0x0000000000000632
frequency: 0
state 1: 0x7f:1:2:0x00:0x0000000000000060
counter: 0x00:32:0:0x03:0x00000000fe00193c
frequency: 8197
"INTC1070" at acpi0 not configured
acpibtn1 at acpi0: LID_(wakeup)
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
"PNP0C14" at acpi0 not configured
acpibtn2 at acpi0: PWRB
"PNP0C0B" at acpi0 not configured
"INTC1025" at acpi0 not configured
"PNP0A05" at acpi0 not configured
tpm0 at acpi0 TPM_ 2.0 (TIS) addr 0xfed40000/0x5000, device 0x0003104a rev 0x1
"ELASEB08" at acpi0 not configured
"ELASE550" at acpi0 not configured
"INTC1042" at acpi0 not configured
"USBC000" at acpi0 not configured
acpipwrres0 at acpi0: PUBS, resource for XHCI
acpipwrres1 at acpi0: WWPR, resource for HS08
acpipwrres2 at acpi0: BTRT
acpipwrres3 at acpi0: DBTR
acpipwrres4 at acpi0: WRST
acpipwrres5 at acpi0: PXP_, resource for RP01, PXSX
acpipwrres6 at acpi0: PXP_, resource for RP06
acpipwrres7 at acpi0: MRST
acpipwrres8 at acpi0: PXP_, resource for RP07
acpipwrres9 at acpi0: PXP_, resource for RP10, PXSX
acpipwrres10 at acpi0: TBT0, resource for TDM0, TRP0, TRP1
acpipwrres11 at acpi0: TBT1, resource for TDM1, TRP2, TRP3
acpipwrres12 at acpi0: D3C_, resource for TXHC, TDM0, TDM1, TRP0, TRP1, TRP2, 
TRP3
acpitz0 at acpi0
acpitz0: critical temperature is 109 degC
acpipwrres13 at acpi0: PIN_
acpipwrres14 at acpi0: PINP
acpivideo0 at acpi0: GFX0
acpivout0 at acpivideo0: DD1F
acpivout1 at acpivideo0: DD2F
cpu0: Enhanced SpeedStep 4790 MHz: speeds: 3101, 3100, 2900, 2700, 2500, 2300, 
2100, 1900, 1700, 1500, 1200, 1100, 1000, 800, 600, 400 MHz
pci0 at mainbus0 bus 0
0:31:5: mem address conflict 0xfe010000/0x1000
pchb0 at pci0 dev 0 function 0 "Intel Core Ultra Host" rev 0x05
inteldrm0 at pci0 dev 2 function 0 "Intel Graphics" rev 0x00
drm0 at inteldrm0
inteldrm0: msi, METEORLAKE, gen 12
"Intel Core Ultra DTT" rev 0x05 at pci0 dev 4 function 0 not configured
ppb0 at pci0 dev 6 function 0 "Intel Core Ultra PCIE" rev 0x00: msi
pci1 at ppb0 bus 28
ppb1 at pci0 dev 6 function 1 "Intel Core Ultra PCIE" rev 0x10: msi
pci2 at ppb1 bus 5
nvme0 at pci2 dev 0 function 0 "Samsung PM9C1a" rev 0x00: msix, NVMe 2.0
nvme0: Samsung SSD 990 EVO Plus 2TB, firmware 2B2QKXG7, serial S7U6NJ0Y635665N
scsibus1 at nvme0: 2 targets, initiator 0
sd0 at scsibus1 targ 1 lun 0: <NVMe, Samsung SSD 990, 2B2Q>
sd0: 1907729MB, 512 bytes/sector, 3907029168 sectors
ppb2 at pci0 dev 7 function 0 "Intel Core Ultra PCIE" rev 0x02: msi
pci3 at ppb2 bus 32
ppb3 at pci0 dev 7 function 2 "Intel Core Ultra PCIE" rev 0x02: msi
pci4 at ppb3 bus 80
"Intel Core Ultra PMT" rev 0x01 at pci0 dev 10 function 0 not configured
"Intel Core Ultra NPU" rev 0x05 at pci0 dev 11 function 0 not configured
xhci0 at pci0 dev 13 function 0 "Intel Core Ultra xHCI" rev 0x02: msi, xHCI 1.20
usb0 at xhci0: USB revision 3.0
uhub0 at usb0 configuration 1 interface 0 "Intel xHCI root hub" rev 3.00/1.00 
addr 1
"Intel Core Ultra TBT" rev 0x02 at pci0 dev 13 function 2 not configured
"Intel Core Ultra TBT" rev 0x02 at pci0 dev 13 function 3 not configured
xhci1 at pci0 dev 20 function 0 "Intel Core Ultra xHCI" rev 0x00: msi, xHCI 1.20
usb1 at xhci1: USB revision 3.0
uhub1 at usb1 configuration 1 interface 0 "Intel xHCI root hub" rev 3.00/1.00 
addr 1
"Intel Core Ultra SRAM" rev 0x00 at pci0 dev 20 function 2 not configured
vendor "Intel", unknown product 0x7740 (class network subclass miscellaneous, 
rev 0x00) at pci0 dev 20 function 3 not configured
dwiic0 at pci0 dev 21 function 0 "Intel Core Ultra I2C" rev 0x00: apic 2 int 32
iic0 at dwiic0
ihidev0 at iic0 addr 0x15 ihidev0: can't establish interrupt
 (polling), vendor 0x4f3 product 0x3195, ELAN0676
ihidev0: 92 report ids
imt0 at ihidev0
imt0: invalid max X/Y 0/0
ims0 at ihidev0 reportid 1: 2 buttons
wsmouse0 at ims0 mux 0
hid at ihidev0 reportid 5 not configured
hid at ihidev0 reportid 7 not configured
hid at ihidev0 reportid 11 not configured
hid at ihidev0 reportid 12 not configured
hid at ihidev0 reportid 13 not configured
ims1 at ihidev0 reportid 14: 0 buttons
wsmouse1 at ims1 mux 0
hid at ihidev0 reportid 84 not configured
hid at ihidev0 reportid 92 not configured
"Intel Core Ultra HECI" rev 0x00 at pci0 dev 22 function 0 not configured
ppb4 at pci0 dev 28 function 0 "Intel Core Ultra PCIE" rev 0x00: msi
pci5 at ppb4 bus 29
ppb5 at pci0 dev 28 function 6 "Intel Core Ultra PCIE" rev 0x00: msi
pci6 at ppb5 bus 8
vendor "Quectel", unknown product 0x100d (class undefined unknown subclass 
0x00, rev 0x00) at pci6 dev 0 function 0 not configured
pcib0 at pci0 dev 31 function 0 vendor "Intel", unknown product 0x7703 rev 0x00
azalia0 at pci0 dev 31 function 3 "Intel Core Ultra HD Audio" rev 0x00: msi
azalia0: codecs: Realtek ALC257
audio0 at azalia0
ichiic0 at pci0 dev 31 function 4 "Intel Core Ultra SMBus" rev 0x00: apic 2 int 
18
iic1 at ichiic0
iic1: addr 0x48 15=2c 16=20 19=04 1b=05 1c=60 1e=60 1f=60 20=89 21=78 22=63 
25=78 26=63 27=78 28=63 29=80 2a=88 2b=42 2c=20 2d=22 2e=04 2f=5a 32=80 34=0e 
3b=06 3c=0b 3d=2a words 00=0000 01=0000 02=0000 03=0000 04=0000 05=0000 06=0000 
07=0000
iic1: addr 0x4a 15=2c 16=20 19=04 1b=05 1c=60 1e=60 1f=60 20=89 21=78 22=63 
25=78 26=63 27=78 28=63 29=80 2a=88 2b=42 2c=20 2d=22 2e=04 2f=5a 32=80 34=0e 
3b=06 3c=0b 3d=2a words 00=0000 01=0000 02=0000 03=0000 04=0000 05=0000 06=0000 
07=0000
"eeprom" at iic1 addr 0x50 not configured
"eeprom" at iic1 addr 0x52 not configured
"Intel Core Ultra SPI" rev 0x00 at pci0 dev 31 function 5 not configured
em0 at pci0 dev 31 function 6 "Intel I219-V" rev 0x00: msi, address 
c8:53:09:ed:7a:cd
isa0 at pcib0
isadma0 at isa0
pckbc0 at isa0 port 0x60/5 irq 1 irq 12
pckbd0 at pckbc0 (kbd slot)
wskbd0 at pckbd0: console keyboard
pms0 at pckbc0 (aux slot)
wsmouse2 at pms0 mux 0
pcppi0 at isa0 port 0x61
spkr0 at pcppi0
vmm0 at mainbus0: VMX/EPT
efifb at mainbus0 not configured
ugen0 at uhub1 port 4 "Generic EMV Smartcard Reader" rev 2.01/1.20 addr 2
uhidev0 at uhub1 port 6 configuration 1 interface 0 "Logitech USB Receiver" rev 
2.00/15.00 addr 3
uhidev0: iclass 3/1
ukbd0 at uhidev0: 8 variable keys, 6 key codes
wskbd1 at ukbd0 mux 1
uhidev1 at uhub1 port 6 configuration 1 interface 1 "Logitech USB Receiver" rev 
2.00/15.00 addr 3
uhidev1: iclass 3/1, 17 report ids
uhidpp0 at uhidev1
ums0 at uhidev1 reportid 2: 16 buttons, Z and W dir
wsmouse3 at ums0 mux 0
ucc0 at uhidev1 reportid 3: 652 usages, 20 keys, array
wskbd2 at ucc0 mux 1
uhid0 at uhidev1 reportid 4: input=1, output=0, feature=0
uvideo0 at uhub1 port 9 configuration 1 interface 0 "Generic Integrated Camera" 
rev 2.01/35.11 addr 4
video0 at uvideo0
uvideo1 at uhub1 port 9 configuration 1 interface 2 "Generic Integrated Camera" 
rev 2.01/35.11 addr 4
video1 at uvideo1
ugen1 at uhub1 port 9 configuration 1 "Generic Integrated Camera" rev 
2.01/35.11 addr 4
ugen2 at uhub1 port 10 "Intel Bluetooth" rev 2.00/0.00 addr 5
vscsi0 at root
scsibus2 at vscsi0: 256 targets
softraid0 at root
scsibus3 at softraid0: 256 targets
sd1 at scsibus3 targ 1 lun 0: <OPENBSD, SR CRYPTO, 006>
sd1: 1907468MB, 512 bytes/sector, 3906496063 sectors
root on sd1a (183c92239531cde7.a) swap on sd1b dump on sd1b
drm:pid2725:gsc_fw_load *ERROR* [drm] *ERROR* GT1: Request submission for GSC 
load failed 0xffffffffffffffc4e
drm:pid2725:intel_uc_fw_mark_load_failed *ERROR* [drm] *ERROR* GT1: Failed to 
load GSC firmware i915/mtl_gsc_1.bin 0xffffffffffffffc4e
inteldrm0: 1920x1200, 32bpp
wsdisplay0 at inteldrm0 mux 1: console (std, vt100 emulation), using wskbd0
wskbd1: connecting to wsdisplay0
wskbd2: connecting to wsdisplay0
wsdisplay0: screen 1-5 added (std, vt100 emulation)

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