On Wed, Jan 07, 2026 at 06:49:46PM +0100, Schuh Andreas wrote:
> It took some time, but it happened again today. Host didn???t panic, but
> wasn???t reachable over network anymore. dmesg shows:
>
> dns2# dmesg
> OpenBSD 7.8 (CUSTOM.MP) #0: Wed Dec 31 00:52:09 CET 2025
> [email protected]:/sys/arch/arm64/compile/CUSTOM.MP
> real mem = 468172800 (446MB)
> avail mem = 415084544 (395MB)
> random: good seed from bootblocks
> mainbus0 at root: Raspberry Pi Zero 2 W Rev 1.0
> efi0 at mainbus0: UEFI 2.11
> efi0: Das U-Boot rev 0x20250700
> smbios0 at efi0: SMBIOS 3.7.0
> smbios0: vendor U-Boot version "2025.07" date 07/01/2025
> smbios0: raspberrypi Raspberry Pi Zero 2 W Rev 1.0
> cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4
> cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
> cpu0: 512KB 64b/line 16-way L2 cache
> cpu0: CRC32,ASID16
> cpu1 at mainbus0 mpidr 1: ARM Cortex-A53 r0p4
> cpu1: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
> cpu1: 512KB 64b/line 16-way L2 cache
> cpu2 at mainbus0 mpidr 2: ARM Cortex-A53 r0p4
> cpu2: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
> cpu2: 512KB 64b/line 16-way L2 cache
> cpu3 at mainbus0 mpidr 3: ARM Cortex-A53 r0p4
> cpu3: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
> cpu3: 512KB 64b/line 16-way L2 cache
> "linux,cma" at mainbus0 not configured
> apm0 at mainbus0
> simplefb0 at mainbus0: 656x416, 32bpp
> wsdisplay0 at simplefb0 mux 1
> wsdisplay0: screen 0-5 added (std, vt100 emulation)
> "system" at mainbus0 not configured
> "axi" at mainbus0 not configured
> simplebus0 at mainbus0: "soc"
> bcmclock0 at simplebus0
> bcmmbox0 at simplebus0
> bcmgpio0 at simplebus0
> bcmaux0 at simplebus0
> bcmdmac0 at simplebus0: DMA0 DMA2 DMA4 DMA5 DMA8 DMA9 DMA10 DMA11
> bcmintc0 at simplebus0
> pluart0 at simplebus0: rev 2, 16 byte fifo
> pluart0: console
> bcmsdhost0 at simplebus0: 250 MHz base clock
> sdmmc0 at bcmsdhost0: 4-bit, sd high-speed, mmc high-speed, dma
> dwctwo0 at simplebus0
> bcmdog0 at simplebus0
> bcmrng0 at simplebus0
> bcmtemp0 at simplebus0
> "interrupt-controller" at simplebus0 not configured
> sdhc0 at simplebus0
> sdhc0: SDHC 3.00, 200 MHz base clock
> sdmmc1 at sdhc0: 4-bit, sd high-speed, mmc high-speed
> "firmware" at simplebus0 not configured
> "power" at simplebus0 not configured
> "mailbox" at simplebus0 not configured
> "gpiomem" at simplebus0 not configured
> "fb" at simplebus0 not configured
> simplebus1 at simplebus0: "nvmem"
> "nvmem_otp" at simplebus1 not configured
> "nvmem_cust" at simplebus1 not configured
> simplebus2 at mainbus0: "clocks"
> "clk-osc" at simplebus2 not configured
> "clk-usb" at simplebus2 not configured
> "phy" at mainbus0 not configured
> "arm-pmu" at mainbus0 not configured
> agtimer0 at mainbus0: 19200 kHz
> "cam1_regulator" at mainbus0 not configured
> "cam_dummy_reg" at mainbus0 not configured
> "fixedregulator_3v3" at mainbus0 not configured
> "fixedregulator_5v0" at mainbus0 not configured
> gpioleds0 at mainbus0: "ACT"
> usb0 at dwctwo0: USB revision 2.0
> uhub0 at usb0 configuration 1 interface 0 "Broadcom DWC2 root hub" rev
> 2.00/1.00 addr 1
> scsibus0 at sdmmc0: 2 targets, initiator 0
> sd0 at scsibus0 targ 1 lun 0: <Sandisk, SD32G, 0085> removable
> sd0: 30436MB, 512 bytes/sector, 62333952 sectors
> uhub1 at uhub0 port 1 configuration 1 interface 0 "Terminus Technology USB
> 2.0 Hub" rev 2.00/1.11 addr 2
> bwfm0 at sdmmc1 function 1
> manufacturer 0x02d0, product 0xa9a6 at sdmmc1 function 2 not configured
> ure0 at uhub1 port 4 configuration 1 interface 0 "Realtek USB 10/100 LAN" rev
> 2.00/20.00 addr 3
> ure0: RTL8152 (0x4c10), address 00:e0:4c:36:01:37
> rlphy0 at ure0 phy 0: RTL8201E, rev. 2
> vscsi0 at root
> scsibus1 at vscsi0: 256 targets
> softraid0 at root
> scsibus2 at softraid0: 256 targets
> root on sd0a (214d5602f304b9de.a) swap on sd0b dump on sd0b
> WARNING: CHECK AND RESET THE DATE!
> gpio0 at bcmgpio0: 54 pins
> bwfm0: address d8:3a:dd:32:17:f6
> ure0: usb error on tx: IN_PROGRESS
> usb_insert_transfer: xfer=0xffffff8003c6b900 not free
> dwc2_softintr: xfer status = NOT_STARTED
> dwc2_softintr: xfer status = NOT_STARTED
> dwc2_softintr: xfer status = NOT_STARTED
> dwc2_softintr: xfer status = NOT_STARTED
> dns2#
OK, thanks for testing this. Then the device, or the controller,
stop operating, and the scheduled transfers remain NOT_STARTED.
The NetBSD dwc2 driver will skip such transfers:
TAILQ_FOREACH_SAFE(dxfer, &sc->sc_complete, xnext, next) {
if (!usbd_xfer_trycomplete(&dxfer->xfer))
/*
* The hard interrput handler decided to
* complete the xfer, and put it on sc_complete
* to pass it to us in the soft interrupt
* handler, but in the time between hard
* interrupt and soft interrupt, the xfer was
* aborted or timed out and we lost the race.
*/
continue;
KASSERT(dxfer->xfer.ux_status == USBD_IN_PROGRESS);
If this condition occurs, and you detach/re-attach the ure device,
will it start operating again, or does it remain broken?
> > Am 28.12.2025 um 22:08 schrieb Marcus Glocker <[email protected]>:
> >
> > On Tue, Dec 23, 2025 at 10:11:00PM +0100, Schuh Andreas wrote:
> >
> >> Machine still panics with the patch:
> >>
> >> ddb{0}> show panic
> >> *cpu0: kernel diagnostic assertion "dxfer->xfer.status ==
> >> USBD_IN_PROGRESS" fai
> >> led: file "/usr/src/sys/dev/usb/dwc2/dwc2.c", line 315
> >
> > OK, pity. Then the xfer status must be something else than
> > USBD_CANCELLED, USBD_TIMEOUT, or USBD_IN_PROGRESS. Maybe USBD_STALLED.
> > Can you please try this diff? It's probably still not the solution to
> > the issue, but at least it should give us more clearness about the xfer
> > status. Again, it should prevent the panic, and print the xfer status
> > in your dmesg output.
> >
> > Thanks,
> > Marcus
> >
> >
> > Index: sys/dev/usb/dwc2/dwc2.c
> > ===================================================================
> > RCS file: /cvs/src/sys/dev/usb/dwc2/dwc2.c,v
> > diff -u -p -u -p -r1.68 dwc2.c
> > --- sys/dev/usb/dwc2/dwc2.c 18 Sep 2022 21:12:19 -0000 1.68
> > +++ sys/dev/usb/dwc2/dwc2.c 28 Dec 2025 21:01:55 -0000
> > @@ -305,6 +305,11 @@ dwc2_softintr(void *v)
> > */
> > mtx_enter(&hsotg->lock);
> > TAILQ_FOREACH_SAFE(dxfer, &sc->sc_complete, xnext, next) {
> > + if (dxfer->xfer.status != USBD_IN_PROGRESS) {
> > + printf("%s: xfer status = %s\n",
> > + __func__, usbd_errstr(dxfer->xfer.status));
> > + continue;
> > + }
> > KASSERT(dxfer->xfer.status == USBD_IN_PROGRESS);
> > KASSERT(dxfer->intr_status != USBD_CANCELLED);
> > KASSERT(dxfer->intr_status != USBD_TIMEOUT);
