On Sat, 04 Apr 2026 18:31:58 +0200, Klemens Nanni <[email protected]> wrote: > > 01.04.2026 23:05, Kirill A. Korinsky пишет: > > On Wed, 01 Apr 2026 21:52:50 +0200, > > Alexander Bluhm <[email protected]> wrote: > >> > >> On Wed, Apr 01, 2026 at 06:15:13PM +0200, Kirill A. Korinsky wrote: > >>> folks, > >>> > >>> I think I found the missed piece which brokes my device. > >>> > >>> Right now octeon increases ncpus after octciu_intr_establish() is called, > >>> and kn@ patch moves increases of ncpus into cpuattach() which happens > >>> before > >>> octciu_intr_establish(), so inside that it routes irq into different cpu > >>> and > >>> it somehow affects my setup. > >>> > >>> Attached version of the patch removes that routing irq to different cpus > >>> which actually doesn't work now because ncpus is 1 and % 1 is always 0. > >>> > >>> I tested it on my device and it works like a charm. > >>> > >>> Feedback? Objection? OK? > >> > >> Diff looks good. My machine distributes traffic on loopback over > >> the 8 softnet threads. Physical interfaces do not distribute traffic > >> as I have no multiqueue interfaces. > >> > >> I am not an octeon expert, but diff looks good to me. Does the > >> ncpus++ in mips64/cpu.c affect other mips architectures beside > >> octeon? > >> > > > > Good point. Fast search shows that at least in loongson's hw_cpu_hatch the > > same ncpus++ need to be remvoed as well. > > > > But I don't understand which impact it brings nor have ability to test it. > > > Here's what kirill and I tested on our octeon ER-4 and ER-6P boxes together > with his octciu(4) fix that just went in. > > As expected, iperf3 performance over cnmac/veb/vport does not change, > but softnet1-3 spin up now, paving the way for kirill's multiqueue work. > > I did not test loongson. > > OK? >
No regression on both my devices, OK kirill@ > > Index: sys/arch/mips64//mips64/cpu.c > =================================================================== > RCS file: /cvs/src/sys/arch/mips64/mips64/cpu.c,v > diff -u -p -r1.86 cpu.c > --- sys/arch/mips64//mips64/cpu.c 3 Apr 2026 22:01:46 -0000 1.86 > +++ sys/arch/mips64//mips64/cpu.c 4 Apr 2026 16:16:34 -0000 > @@ -103,6 +103,7 @@ cpuattach(struct device *parent, struct > ci_last = ci_last->ci_next; > ci_last->ci_next = ci; > ci->ci_flags |= CPUF_PRESENT; > + ncpus++; > } > #else > ci = &cpu_info_primary; > Index: sys/arch/octeon//octeon/machdep.c > =================================================================== > RCS file: /cvs/src/sys/arch/octeon/octeon/machdep.c,v > diff -u -p -r1.137 machdep.c > --- sys/arch/octeon//octeon/machdep.c 24 Oct 2023 13:20:10 -0000 1.137 > +++ sys/arch/octeon//octeon/machdep.c 4 Apr 2026 16:20:08 -0000 > @@ -1334,8 +1334,6 @@ hw_cpu_hatch(struct cpu_info *ci) > ci->ci_flags |= CPUF_RUNNING; > membar_sync(); > > - ncpus++; > - > spl0(); > (void)updateimask(0); > > Index: sys/arch/loongson//loongson/machdep.c > =================================================================== > RCS file: /cvs/src/sys/arch/loongson/loongson/machdep.c,v > diff -u -p -r1.101 machdep.c > --- sys/arch/loongson//loongson/machdep.c 24 Oct 2023 13:20:10 -0000 > 1.101 > +++ sys/arch/loongson//loongson/machdep.c 4 Apr 2026 16:19:47 -0000 > @@ -1308,8 +1308,6 @@ hw_cpu_hatch(struct cpu_info *ci) > ci->ci_flags |= CPUF_RUNNING; > membar_sync(); > > - ncpus++; > - > spl0(); > (void)updateimask(0); > > -- wbr, Kirill
