#3682: Add BSP for Xilinx Zynq UltraScale+ MPSoC platform
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Reporter: Sebastian Huber | Owner: Sebastian Huber
Type: project | Status: assigned
Priority: normal | Milestone: 5.1
Component: arch/arm | Version: 5
Severity: normal | Resolution:
Keywords: | Blocked By:
Blocking: |
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Comment (by Sebastian Huber):
This project is probably too complex for a GSoC project. I am not
available as a mentor.
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Ticket URL: <http://devel.rtems.org/ticket/3682#comment:2>
RTEMS Project <http://www.rtems.org/>
RTEMS Project
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