Matheus Pecoraro commented on a discussion on bsps/x86_64/amd64/interrupts/isr_handler.S: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95#note_108084 > /* Save the initial rsp */ > movq SAVED_RSP, (0 * CPU_SIZEOF_POINTER)(rsp) > > + /* Save x87 FPU, MMX and SSE state */ > +.set FXSAVE_SIZE, 512 > + /* Make space for FXSAVE */ > + subq $FXSAVE_SIZE, rsp > + fwait > + fxsave64 (rsp) [This](https://www.agner.org/optimize/instruction_tables.pdf) was the only resource I could find and I don't think it's possible to determine a reliable number. I think "Latency" would be the best metric to determine this and in the ones it's reported for the 64 bit mode of the instruction it seems to average around ~65 for FXSAVE and ~80 for FXRSTOR. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95#note_108084 You're receiving this email because of your account on gitlab.rtems.org.
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