Aaron Nyholm commented on a discussion on bsps/arm/xilinx-zynq/dev/spi/zynq-qspi-flash-transfer.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/295#note_114541 > + > + return ZQSPI_FLASH_NO_ERROR; > +} > + > +void zqspi_transfer_intr(zqspiflash *driver) { > + uint32_t sr; > + zqspi_transfer_buffer* transfer = &(driver->buf); > + > + /* Disable and clear interrupts */ > + qspi_reg_write(ZQSPI_QSPI_REG_INTR_DISABLE, 0xFFFFFFFF); > + qspi_reg_write(ZQSPI_QSPI_REG_INTR_STATUS, 0xFFFFFFFF); > + sr = qspi_reg_read(ZQSPI_QSPI_REG_INTR_STATUS); > + > + if (transfer->rx_length) > + { > + while (transfer->start && transfer->sending) Yeah intentional. There is always a TX component to each transfer. You have to send the read command and to receive data. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/295#note_114541 You're receiving this email because of your account on gitlab.rtems.org.
_______________________________________________ bugs mailing list [email protected] http://lists.rtems.org/mailman/listinfo/bugs
