Kinsey Moore commented on a discussion: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5383#note_135686 And from Wikipedia RISC-V: `An execution environment interface may allow accessed memory addresses not to be aligned to their word width, but accesses to aligned addresses may be faster; for example, simple CPUs may implement unaligned accesses with slow software emulation driven from an alignment failure interrupt.` RTEMS is definitely not doing this emulation as RTEMS_EXCEPTION_EXTENSIONS is only supported on microblaze and aarch64. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5383#note_135686 You're receiving this email because of your account on gitlab.rtems.org.
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