Lucian Silistru created an issue: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5486
## Summary Running riscv/riscv clockdrv on a cpu where "time" frequency << cpu frequency. It is possible that the code between https://gitlab.rtems.org/rtems/rtos/rtems/-/blob/main/bsps/riscv/riscv/clock/clockdrv.c?ref_type=heads#L209 and https://gitlab.rtems.org/rtems/rtos/rtems/-/blob/main/bsps/riscv/riscv/clock/clockdrv.c?ref_type=heads#L179 executes before "time" ticks up (SMP, single core active); the check on the latter line then fails because the values are equal. bsp/riscv/riscv -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5486 You're receiving this email because of your account on gitlab.rtems.org.
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