SHIVAM DEOLANKAR commented on a discussion: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1116#note_145033 I have updated the implementation to use the device tree for defining the PCIe memory mappings. The BSP now retrieves the PCIe `ranges` property from the FDT and creates the MMU mappings dynamically using `aarch64_mmu_map()`. This removes the previous hardcoded PCIe address mappings from the BSP. The `aarch64/zynqmp_apu` BSP builds successfully with these changes. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1116#note_145033 You're receiving this email because of your account on gitlab.rtems.org.
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