Gedare Bloom started a new discussion on cpukit/score/cpu/riscv/riscv-exception-handler.S: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147642 > + /* > + * Vectored exception/interrupt handlers can require the vector base to > + * be aligned to 256 bytes > + */ > + .align 8 > .option arch, +zicsr > > -TYPE_FUNC(_RISCV_Exception_handler) > -SYM(_RISCV_Exception_handler): > +/* > + * This could be a nop slide, but it would introduce additional latency into > + * interrupt handling depending on which interrupt was triggered > + */ > +TYPE_FUNC(_RISCV_Vector_table) > +SYM(_RISCV_Vector_table): > + j .LRISCV_Exception_handler You can use [.rept](https://sourceware.org/binutils/docs/as/Rept.html) -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147642 You're receiving this email because of your account on gitlab.rtems.org.
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