Moksh Panicker commented on a discussion on bsps/arm/stm32f4/spi/spi.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1294#note_152109 > + * a single byte. One byte is therefore in flight at a time: TXE fires > + * when DR is empty and we write the next TX byte; RXNE fires when a > + * received byte is available and we read it. When all bytes have been > + * received we wake the blocked task. DMA would eliminate the per-byte > + * interrupt overhead but is not implemented in this initial version. > + */ > +static void stm32f4_spi_isr(void *arg) > +{ > + stm32f4_spi_bus *bus = arg; > + volatile stm32f4_spi *regs = bus->regs; > + uint32_t sr = regs->sr; > + > + if (sr & STM32F4_SPI_SR_TXE) { > + uint8_t byte = 0; > + if (bus->tx_buf != NULL) { > + byte = *bus->tx_buf++; Done, split into two lines throughout. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1294#note_152109 You're receiving this email because of your account on gitlab.rtems.org.
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