Pavel Pisa commented: 
https://gitlab.rtems.org/rtems/pkg/rtems-lwip/-/merge_requests/48#note_154990


Hello @ar-in0 and others, I have checked all provided commits and all changes 
seems to me as logical and correct. It would worth to test that even on other 
targets which have LwIP functional.

I have tested the build only for TMS570LS3137 now and when I find time I do 
more testing.

I have found problem with `TMS570_MMR_SELECT_GMII_SEL` which has been renamed 
to `TMS570_MMR_SELECT_MII_MODE` long time ago in the commit 
https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/3a0dcd5ee97dd150cdea9d1d2ca06e81f58436fc
 and has not propagated into LwIP. But that is not @ar-in0 fault and needs to 
be updated anyway.

As for the pins setup, I would suggest to use symbolic pins/balls defines if 
they are found in 
[bsps/arm/tms570/include/bsp/tms570lc4357-pins.h](https://gitlab.rtems.org/rtems/rtos/rtems/-/blob/main/bsps/arm/tms570/include/bsp/tms570lc4357-pins.h).
 But that is not as critical for now.

So generally this series represents lot of hard work and I will be happy if it 
reaches mainline.

As for the errors indications, it can be related to some access to initialized 
Flash or RAM or elsewhere and it would wort to attempt to find it. It is 
possible that some RAM area does not have initialized parity bits or something 
similar. Clear by loop or memset could help or the initial memory tests can 
help.

As for endianness errata on TMS570LC4357, I am curious if the problem is the 
same if the descriptors are placed in regular SRAM, but there would be problem 
with caching which are much harder to solve for descriptors then for data. I 
expect that EMAC's CPPI RAM is uncached. But I can be wrong. I think that we 
have tested use of other RAM for buffer descriptors during initial TMS570 
bringup, but I am not sure about that. But generally it seems that solution is 
correct and in conformance with HalCoGen solution.

-- 
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