Joel Sherrill commented on a discussion on cpukit/score/cpu/powerpc/include/rtems/score/cpu.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1367#note_155421 > /** Type that can store a 32-bit integer or a pointer. */ > typedef uintptr_t CPU_Uint32ptr; > > +/** > + * Pauses the CPU pipeline to prevent aggressive speculative execution > + * and reduce thermal load during spin-wait loops. > + * > + * For PowerPC SMP targets (QorIQ e500mc, e5500, e6500), this issues a Power > + * ISA yield instruction ('or 27,27,27'). On e6500 cores with hardware > + * multithreading enabled, this temporarily deprioritizes the executing > + * thread. On single-threaded or legacy cores, this executes safely as a > + * no-operation (nop). > + */ > +static inline void _CPU_Spin_wait( void ) > +{ > + __asm__ volatile ( "or 27, 27, 27" : : : "memory" ); @vijay Which form of the _or_ do you think should be used? [Stack Overflow](https://stackoverflow.com/questions/5425506/equivalent-of-x86-pause-instruction-for-ppc) has a discussion including a set of give _or_ variants from Linux along with an image from a PowerPC manual. [glibc's ppc.h](https://codebrowser.dev/glibc/glibc/sysdeps/powerpc/sys/platform/ppc.h.html#53) has static inline functions for the _or_ forms with comments that appear to match the PowerPC manual. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1367#note_155421 You're receiving this email because of your account on gitlab.rtems.org. Unsubscribe from this thread: https://gitlab.rtems.org/-/sent_notifications/4-5obwr66elbr3yuhlrtnpvn5wy-1d/unsubscribe | Manage all notifications: https://gitlab.rtems.org/-/profile/notifications | Help: https://gitlab.rtems.org/help
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