Issue created by Lucian Silistru: 
https://gitlab.rtems.org/rtems/rtos/rtems/-/work_items/5812



## Summary
On SMP configurations, `Per_CPU_Control_envelope` pads each per-CPU control to 
`PER_CPU_CONTROL_SIZE`, a power of two chosen from 
`PER_CPU_CONTROL_SIZE_APPROX`:

```
char unused_space_for_cache_line_alignment
  [ PER_CPU_CONTROL_SIZE - sizeof( Per_CPU_Control ) ];
```

Without `RTEMS_PROFILING`, the last member `Per_CPU_Stats Stats` is an empty 
struct. GCC gives it size 0 in C, but C++ requires a size of at least 1. The 
extra byte is then rounded up to `alignof( Per_CPU_Control )`. If the C size is 
exactly `PER_CPU_CONTROL_SIZE`, the C++ size goes over the limit,
the array size wraps around, and every C++ file that includes `percpu.h`
fails to compile:

```
cpukit/include/rtems/score/percpu.h:647:28: error: size '18446744073709551600'
of array 'unused_space_for_cache_line_alignment' exceeds maximum object size
```

C code is not affected, so the RTEMS libraries build. The failure shows up only 
in C++ code, for example an application that includes `<rtems/confdefs.h>` from 
a `.cc` file (`confdefs.h` -> `confdefs/newlib.h` -> `threaddispatch.h` -> 
`percpu.h`), or the `cdtest` and `iostream` samples.

## Steps to reproduce

No configuration on current `main` hits an exact fit. It was found with the 
RISC-V Smrnmi support (!1391), where the C size of `Per_CPU_Control` was 
exactly 512:

```
[riscv/rv64imac]
RTEMS_SMP = True
RISCV_SMRNMI = True
RISCV_RNMI_VECTOR_ADDRESS = 0x84000000
```

Building with the default `BUILD_SAMPLES` fails in 
`testsuites/samples/cdtest/main.cc` and `testsuites/samples/iostream/init.cc`.

### Possible fix

Account for the C++ tail byte in the estimate. `CPU_ALIGNMENT` is visible in 
`percpu.h` through `cpuimpl.h`, also in assembly on all SMP-capable ports:
```
#else
-#define PER_CPU_CONTROL_SIZE_PROFILING 0
+#define PER_CPU_CONTROL_SIZE_PROFILING CPU_ALIGNMENT
#endif
```

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/work_items/5812
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