On Fri, 20 Dec 2024 12:51:06 GMT, Hamlin Li <m...@openjdk.org> wrote:
>> Hi please consider. >> >> This adds below to hs_err: >> >> Floating point state: >> fcsr=1 >> Floating point registers: >> f0=0xffffffff44a72000 | 1.84467e+19 >> f1=0xffffffff44a72000 | 1.84467e+19 >> .... >> f31=0xffffffff44a72000 | 1.84467e+19 >> >> Vector state: >> vstart=0x0000000000000000 >> vl=0x0000000000000020 >> vtype=0x0000000000000000 >> vcsr=0x0000000000000000 >> vlenb=0x0000000000000020 >> Vector registers: >> v0=0x0101010101010101010101010101010101010101010101010101010101010101 >> .... >> v31=0x0101010101010101010101010101010101010101010101010101010101010101 >> >> >> To get vector the headers need to include those structures, hence build >> files hackery. >> This means if you compile on a kernel without RVV support the error handler >> will lack support for it. >> We don't care about RVV option as carshing in native may still use vector >> even if the jit do not. >> >> I'm doubt full about the printing as double for fp regs, maybe that should >> be removed. >> >> Local testing, running t1 over weekend. >> >> Thanks, Robbin > > src/hotspot/os_cpu/linux_riscv/os_linux_riscv.cpp line 383: > >> 381: } >> 382: >> 383: // size = sizeof(struct __riscv_ctx_hdr) + sizeof(struct >> __sc_riscv_v_state) + riscv_v_vsize; > > no use? This is the kernel definition what **size** is. I.e. it do not contain the entire sigcontext. I'll add comment. ------------- PR Review Comment: https://git.openjdk.org/jdk/pull/22845#discussion_r1893935310
