thank a lot
there's no PCI bus on TARGET, there's no DMA enalbed yet, I'll work on this
in the coming days, it's a great appreciation to get your instructions in
advance. In short, to accelerate the HD, how to speed up "hdparm -T xxx"
and how to enable DMA, I'm a newbie on device driver. please check the
following messages:
[EMAIL PROTECTED] ~]# dmesg
Linux version 2.6.20 ([EMAIL PROTECTED]) (gcc version 3.4.1) #35
Tue May 22 17:28:17 CST 2007
CPU: ARM920T [41129200] revision 0 (ARMv4T), cr=00007177
Machine: SMDK2410
Warning: bad configuration page, trying to continue
Memory policy: ECC disabled, Data cache writeback
On node 0 totalpages: 4096
DMA zone: 32 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 4064 pages, LIFO batch:0
Normal zone: 0 pages used for memmap
CPU S3C2410A (id 0x32410002)
S3C2410: core 202.800 MHz, memory 101.400 MHz, peripheral 50.700 MHz
S3C24XX Clocks, (c) 2004 Simtec Electronics
CLOCK: Slow mode (1.500 MHz), fast, MPLL on, UPLL on
CPU0: D VIVT write-back cache
CPU0: I cache: 16384 bytes, associativity 64, 32 byte lines, 8 sets
CPU0: D cache: 16384 bytes, associativity 64, 32 byte lines, 8 sets
Built 1 zonelists. Total pages: 4064
Kernel command line: noinitrd root=/dev/mtdblock2 init=/linuxrc
console=ttySAC0,115200
irq: clearing subpending status 00000002
PID hash table entries: 64 (order: 6, 256 bytes)
timer tcon=00500000, tcnt a509, tcfg 00000200,00000000, usec 00001e4c
Console: colour dummy device 80x30
selected clock c025146c (pclk) quot 27, calc 113169
Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
Memory: 16MB = 16MB total
Memory: 13716KB available (2180K code, 223K data, 84K init)
Calibrating delay loop... 50.48 BogoMIPS (lpj=126208)
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
S3C24XX DMA Driver, (c) 2003-2004,2006 Simtec Electronics
Registering sysclass
DMA channel 0 at c1800000, irq 33
DMA channel 1 at c1800040, irq 34
DMA channel 2 at c1800080, irq 35
DMA channel 3 at c18000c0, irq 36
NET: Registered protocol family 16
S3C2410 Power Management, (c) 2004 Simtec Electronics
S3C2410: Initialising architecture
0: xdreq0, channels 0---
1: xdreq1, channels -1--
2: sdi, channels 0-23
3: spi0, channels -1--
4: spi1, channels ---3
5: uart0, channels 0---
6: uart1, channels -1--
7: uart2, channels ---3
8: timer, channels 0-23
9: i2s-sdi, channels -12-
10: i2s-sdo, channels --2-
11: <NULL>, channels ----
12: <NULL>, channels ----
13: <NULL>, channels ----
14: usb-ep1, channels 0---
15: usb-ep2, channels -1--
16: usb-ep3, channels --2-
17: usb-ep4, channels ---3
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 0, 4096 bytes)
TCP bind hash table entries: 512 (order: -1, 2048 bytes)
TCP: Hash tables configured (established 1024 bind 512)
TCP reno registered
NetWinder Floating Point Emulator V0.97 (double precision)
yaffs May 21 2007 09:39:24 Installing.
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
Console: switching to colour frame buffer device 80x25
fb0: Virtual frame buffer device, using 1024K of video memory
s3c2410-uart.0: s3c2410_serial0 at MMIO 0x50000000 (irq = 70) is a S3C2410
s3c2410-uart.1: s3c2410_serial1 at MMIO 0x50004000 (irq = 73) is a S3C2410
s3c2410-uart.2: s3c2410_serial2 at MMIO 0x50008000 (irq = 76) is a S3C2410
dm9000 Ethernet Driver
The ID of dm9000 is 0x90000a46.
eth0: dm9000 at c1910000,c1912004 IRQ 16 MAC: 08:00:3e:26:0a:5b
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
return valude of ide_hwif_request_regions is 0
Probing IDE interface ide0...
hda: probing with STATUS(0x50) instead of ALTSTATUS(0x00)
before read id info cfs_xx is 0x0
after read id info cfs_xx is 0x201
hda: ST340016A, ATA DISK drive
hdb: probing with STATUS(0x00) instead of ALTSTATUS(0xa5)
hdb: probing with STATUS(0x00) instead of ALTSTATUS(0xa5)
ide1: I/O resource 0xF1800010-0xF1800010 not free.
return valude of ide_hwif_request_regions is -16
ide1: ports already in use, skipping probe
ide2: I/O resource 0xF1800010-0xF1800010 not free.
return valude of ide_hwif_request_regions is -16
ide2: ports already in use, skipping probe
ide3: I/O resource 0xF1800010-0xF1800010 not free.
return valude of ide_hwif_request_regions is -16
ide3: ports already in use, skipping probe
ide0 at 0xf1800020-0xf1800027,0xf1800010 on irq 50
hda: max request size: 128KiB
hda: 78165360 sectors (40020 MB) w/2048KiB Cache, CHS=65535/16/63
driver-nofulsh=0 ,drive->addressing =0 capacity =4a8b570 id)->cfs_enable_2 =
0x0
hda: cache flushes not supported
hda: hda1
S3C24XX NAND Driver, (c) 2004 Simtec Electronics
s3c2410-nand s3c2410-nand: Tacls=3, 29ns Twrph0=7 69ns, Twrph1=3 29ns
NAND device: Manufacturer ID: 0xec, Chip ID: 0x76 (Samsung NAND 64MiB 3,3V
8-bit)
Scanning device for bad blocks
Creating 6 MTD partitions on "NAND 64MiB 3,3V 8-bit":
0x00000000-0x00100000 : "BootLoader"
0x00100000-0x00900000 : "Kernel"
0x00900000-0x01000000 : "Root FileSystem"
0x01000000-0x02000000 : "Applications1"
0x02000000-0x03400000 : "Applications2"
0x03400000-0x04000000 : "Configuration /etc"
mice: PS/2 mouse device common for all mice
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
VFS: Mounted root (cramfs filesystem) readonly.
Freeing init memory: 84K
selected clock c025146c (pclk) quot 27, calc 113169
selected clock c025146c (pclk) quot 27, calc 113169
selected clock c025146c (pclk) quot 27, calc 113169
yaffs: dev is 32505861 name is "mtdblock5"
yaffs: Attempting MTD mount on 31.5, "mtdblock5"
yaffs: auto selecting yaffs1
eth0: link up, 10Mbps, half-duplex, lpa 0x0021
[EMAIL PROTECTED] tmp]# hdparm -I /dev/hda
/dev/hda:
ATA device, with non-removable media
Model Number: ST340016A
Serial Number: 3HSAKKC2
Firmware Revision: 3.19
Standards:
Supported: 5 4 3
Likely used: 6
Configuration:
Logical max current
cylinders 16383 16383
heads 16 16
sectors/track 63 63
--
CHS current addressable sectors: 16514064
LBA user addressable sectors: 78165360
device size with M = 1024*1024: 38166 MBytes
device size with M = 1000*1000: 40020 MBytes (40 GB)
Capabilities:
LBA, IORDY(can be disabled)
bytes avail on r/w long: 4
Standby timer values: spec'd by Standard
R/W multiple sector transfer: Max = 16 Current = ?
Recommended acoustic management value: 128, current value: 128
DMA: mdma0 mdma1 *mdma2 udma0 udma1 udma2 udma3 udma4 udma5
Cycle time: min=120ns recommended=120ns
PIO: pio0 pio1 pio2 pio3 pio4
Cycle time: no flow control=240ns IORDY flow control=120ns
Commands/features:
Enabled Supported:
* SMART feature set
Security Mode feature set
* Power Management feature set
* Write cache
* Look-ahead
* Host Protected Area feature set
* WRITE_BUFFER command
* READ_BUFFER command
* DOWNLOAD_MICROCODE
SET_MAX security extension
* Automatic Acoustic Management feature set
Device Configuration Overlay feature set
Security:
Master password revision code = 65534
supported
not enabled
not locked
not frozen
not expired: security count
not supported: enhanced erase
HW reset results:
CBLID- above Vih
Device num = 1
Checksum: correct
On 5/23/07, Denis Vlasenko <[EMAIL PROTECTED]> wrote:
On Tuesday 22 May 2007 07:27, kaimi wrote:
> hi,all
> I want to enable cache flushes for my hd on s3c2410 & linux-2.6.20,
> ide_id_has_flush_cache() return 0 because cfs_enable_2 is 0x201, while
it
> needs 0x3000, I found out that 0x201 was from 512 bytes of id
> info,implemented in static void ata_input_data(ide_drive_t *drive, void
> *buffer, u32 wcount)
> the question is, does it mean my hd does not support cache flush on hw
> layer? if not, how to enable?
> thanks for the coming help!
"Cache flush" has nothing to do with hdparm -T.
hdparm -T measures reads done repeatedly at start of device:
do {
++iterations;
if (seek_to_zero(fd) || read_big_block(fd, buf))
goto quit;
getitimer(ITIMER_REAL, &e2);
elapsed = (e1.it_value.tv_sec - e2.it_value.tv_sec
)
+ ((e1.it_value.tv_usec -
e2.it_value.tv_usec) / 1000000.0);
} while (elapsed < 2.0);
[read_big_block is simply read(TIMING_BUF_BYTES) + dirty
each sector's first byte]
Any non-ancient disk and kernel will cache the data after
the first read. Subsequent reads depend on the speed
of IDE bus, CPU, and memory. Now imagine now vastly different
those are is your PC and your target machine.
--
vda
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