function [ return_value ] = lower_freq( basedir_name )
%LOWER_FREQ Change params to compile at lower clock freq
%   Change params in vhdl base system in order to get the design compiled
%   at low clock freuencies
%
% USAGE: lower_freq( basedir_name ) 
if ~isdir(basedir_name)
    disp(['Cannot find directory: ' basedir_name]);
    return_value = 0;
    return;
end

vhdl_path = [basedir_name '/XPS_ROACH_base/pcores/adc_interface_v1_01_a/hdl/vhdl/'];
if ~isdir(vhdl_path)
    disp(['Cannot find directory: ' vhdl_path]);
    disp('Compile desigin up to \"Copy base package\" in bee_xps');
    return_value = 0;
    return;
end

adc_interface_path = [vhdl_path 'adc_interface.vhd'];
orig_file = fopen(adc_interface_path, 'rt');
if orig_file <= 0
    disp(['Cannot open file: ' adc_interface_path]);
    return_value = 0;
    return;
end

temp_path = [pwd() '/vhdtmp.vhd'];
tmp_file = fopen(temp_path, 'w+t');
if tmp_file <= 0
    disp(['Cannot open file: ' temp_path  ' for writing']);
    return_value = 0;
    return;
end

tline = fgetl(orig_file);
while ischar(tline)
    for o = strfind(tline, 'HIGH')
        disp([tline ' -> ' num2str(o)]);
        tline = strrep(tline, 'HIGH', 'LOW');
        disp(tline);
    end
    fwrite(tmp_file, tline);
    fprintf(tmp_file, '\n');
    tline = fgetl(orig_file);
end
fclose('all');

movefile(temp_path, adc_interface_path);
return_value = 1;
return;
