A Signetics PLS173 PLA has a total of 2178 programmable fuses: (32 AND gates for logic terms plus 10 AND gates for control terms) times (24 true/complement inputs plus 20 true/complement inputs/outputs) = 1848 fuses
(10 OR gates) times (32 AND gates logic term outputs) = 320 fuses 10 fuses for true/complement output selection For reference see the PLS173 FPLA Logic Diagram on page 5-70 (page 242 of the PDF) of the Signetics PLD Data Manual 1987 http://www.bitsavers.org/_dataBooks/1987_Signetics_pldData.pdf The question is for anyone here that knows: How are these fuses in the FPLA Logic Diagram numbered as they would be in a JEDEC fuse map file used to program a device, or when read back from a device? I can't find that information anywhere. If I read a PLS173 device into a JEDEC fuse map it should be trivial to generate the logic equations by hand if the fuse numbering is known, which is what I want to do.
