On 07/19/2017 03:10 PM, Eric Smith via cctalk wrote: > I'm interested in the history of the logic design for the edge-triggered D > flip-flop, as used in the SN7474. The design is composed of three set-reset > latches (six NAND gates total) per flip-flop. > > Does anyone know what year the SN7474 was introduced, or have an early > datasheet for it (prior to the 1973 TTL Data Book For Design Engineers 1st > Edition? > > The earliest datasheet I've found using this specific logic design for an > edge-triggered D flip-flop is from a non-7400-series TTL chip, the Motorola > MC3060/3160, which is a member of the MTTL III MC3000/MC3100 series.The > MC3060 is covered in the Motorola 1968 IC databook, on page 4-138.
It's interesting. I pulled out my Moto 1969 databook, and while the 7400 series numbers jump for 7473 to 7475, but MC7479 is listed as an exact replacement for the TI 7474. There are, of course, earlier edge-triggered flip-flops in other logic families; e.g., the MC1022 ECL flop. --Chuck
