> -----Original Message-----
> From: Eduardo Cruz [mailto:[email protected]]
> Sent: 04 November 2018 13:47
> To: [email protected]; Rob Jarratt <[email protected]>; General
> Discussion: On-Topic and Off-Topic Posts <[email protected]>
> Cc: Tony Duell <[email protected]>
> Subject: Re: Datasheet for a NEC Chip in DEC Professional 350
>
> A constant pulsing reset is usually a watchdog at play. Hardware watchdogs
> are usually implemented in systems to reset everything should the system
> not meet one specific criteria: eg cpu touch one memory address before X
> amount of time, or pcb voltage lower than X volts, etc.
>
> Watchdogs are also usually found as software routines executed by the cpu
> also looking for specific conditions. These rarely issue a reset hardware
signal,
> just restar the program.
>
It looks to me like the reset is every 10us. I don't know how long the
watchdog is likely to be, the technical manual I have doesn't seem to
mention it in the section on the reset logic. I am still trying to find the
source of the signal that seems to be in the "wrong" state.
Regards
Rob
