On 2019-06-11 6:17 a.m., Paul Birkel via cctalk wrote:
-----Original Message-----
From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Chuck Guzis
via cctalk
Sent: Tuesday, June 11, 2019 12:19 AM
To: Tony Duell via cctalk
Subject: Re: HP9816 PAL16L8
On 6/10/19 8:44 PM, Tony Duell via cctalk wrote:
You can detect sequential logic in the PAL by :
For each combination of inputs :
Read the outputs
Toggle an input (change from 0 to 1 and back again or vice versa)
Compare the outputs to what they were before -- if they have
changed then there's a sequential function on that input
Check the next input
Check the next combination of inputs
For purely combinatorial PLDs, see my blog entry on the subject over at
vcfed.org; I did the work to clone a few PALs some years ago and
documented the process.
http://www.vcfed.org/forum/entry.php?330-Cloning-a-PAL-HAL-Part-13
http://www.vcfed.org/forum/entry.php?329-Cloning-a-HAL-PAL-Part-12-The-Trantor-T130B-memory-PAL
http://www.vcfed.org/forum/entry.php?328-Cloning-a-HAL-PAL-Part-11
http://www.vcfed.org/forum/entry.php?327-Cloning-a-HAL-PAL-Part-10
http://www.vcfed.org/forum/entry.php?326-Cloning-a-HAL-PAL-Part-9
http://www.vcfed.org/forum/entry.php?325-Cloning-a-PAL-HAL-Part-8
http://www.vcfed.org/forum/entry.php?321-Cloning-a-PAL-HAL-(Part-7)
http://www.vcfed.org/forum/entry.php?320-Cloning-a-PAL-HAL-(Part-6)
http://www.vcfed.org/forum/entry.php?319-Cloning-a-PAL-HAL-(Part-5)
http://www.vcfed.org/forum/entry.php?318-Cloning-a-PAL-HAL-(Part-4)
http://www.vcfed.org/forum/entry.php?316-Cloning-a-PAL-HAL-(Part-3)
http://www.vcfed.org/forum/entry.php?315-Cloning-a-PAL-HAL-(Part-2)
http://www.vcfed.org/forum/entry.php?314-Cloning-a-PAL-HAL-(Part-1)
A nice read. When does the article/book get self-published :->?
-----
paul
The process documented above is essentially the process I started last
night, but in my case I used a GPIO in my HP 9000-332 to cycle through
the inputs and record the output. It is very handy to have general
purpose parallel I/O for purposes like this. In this case the number of
possible states is reduced as two of the inputs are permanently tied
high. I am well on my well to developing logic equations to feed into
palasm to generate a new JEDEC file which I can then burn into a GAL and
test to see if it is correct.
Paul.
